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X-CSE-ConnectionGUID: iz3LTufjRVCmemKvxfMZhw== X-CSE-MsgGUID: VJaJS/ifQ2iExZZVMzRiFQ== X-IronPort-AV: E=McAfee;i="6800,10657,11732"; a="100239770" X-IronPort-AV: E=Sophos;i="6.23,124,1770624000"; d="scan'208";a="100239770" Received: from fmviesa006.fm.intel.com ([10.60.135.146]) by fmvoesa101.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2026 06:07:34 -0700 X-CSE-ConnectionGUID: AvYKnYs2SLSTsTIkPNxv/w== X-CSE-MsgGUID: f3iVZsrJQFiedHUOLmFoDg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="6.23,124,1770624000"; d="scan'208";a="217963748" Received: from krybak-mobl1.ger.corp.intel.com (HELO localhost) ([10.245.246.32]) by fmviesa006-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Mar 2026 06:07:32 -0700 From: Jani Nikula To: Ville Syrjala , intel-gfx@lists.freedesktop.org Cc: stable@vger.kernel.org Subject: Re: [PATCH] drm/i915: Order OP vs. timeout correctly in __wait_for() In-Reply-To: <20260313110740.24620-1-ville.syrjala@linux.intel.com> Organization: Intel Finland Oy - BIC 0357606-4 - c/o Alberga Business Park, 6 krs Bertel Jungin Aukio 5, 02600 Espoo, Finland References: <20260313110740.24620-1-ville.syrjala@linux.intel.com> Date: Tue, 17 Mar 2026 15:07:29 +0200 Message-ID: Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: quoted-printable On Fri, 13 Mar 2026, Ville Syrjala wrote: > From: Ville Syrj=C3=A4l=C3=A4 > > Put the barrier() before the OP so that anything we read out in > OP and check in COND will actually be read out after the timeout > has been evaluated. > > Currently the only place where we use OP is __intel_wait_for_register(), > but the use there is precisely susceptible to this reordering, assuming > the ktime_*() stuff itself doesn't act as a sufficient barrier: > > __intel_wait_for_register(...) > { > ... > ret =3D __wait_for(reg_value =3D intel_uncore_read_notrace(...), > (reg_value & mask) =3D=3D value, ...); > ... > } > > Cc: stable@vger.kernel.org > Fixes: 1c3c1dc66a96 ("drm/i915: Add compiler barrier to wait_for") > Signed-off-by: Ville Syrj=C3=A4l=C3=A4 Reviewed-by: Jani Nikula > --- > drivers/gpu/drm/i915/i915_wait_util.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_wait_util.h b/drivers/gpu/drm/i915= /i915_wait_util.h > index 7376898e3bf8..e1ed7921ec70 100644 > --- a/drivers/gpu/drm/i915/i915_wait_util.h > +++ b/drivers/gpu/drm/i915/i915_wait_util.h > @@ -25,9 +25,9 @@ > might_sleep(); \ > for (;;) { \ > const bool expired__ =3D ktime_after(ktime_get_raw(), end__); \ > - OP; \ > /* Guarantee COND check prior to timeout */ \ > barrier(); \ > + OP; \ > if (COND) { \ > ret__ =3D 0; \ > break; \ --=20 Jani Nikula, Intel