* [PATCH 1/6] mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
@ 2025-11-05 17:27 ` Miquel Raynal
2025-11-05 17:27 ` [PATCH 2/6] mtd: spi-nor: winbond: Add support for W25Q01NWxxIM chips Miquel Raynal
` (8 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:27 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
This chip must be described as none of the block protection information
are discoverable. This chip supports 4 bits plus the top/bottom
addressing capability to identify the protected blocks.
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
cat: can't open '/sys/bus/spi/devices/spi0.0/spi-nor/partname': No
such file or directory
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
ef6021
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond
$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060101ff00060110800000ff84000102d00000ffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520fbffffffff3f44eb086b083b42bbfeffffffffff
0000ffff40eb0c200f5210d800003652b50082ea14e2e96376337a757a75
f7bdd55c19f75dffe970f9a5ffffffffffffffffffffffffffffffffff0a
f0ff21ffdcff
$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
d70b64bfa72dad202ff6881f92676b3a79b1e634b60653cd15f1820b7f3acaea
/sys/bus/spi /devices/spi0.0/spi-nor/sfdp
$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id ef 60 21 00 00 00
size 128 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | HAS_SR_TB_BIT6 | HAS_4BIT_BP | SOFT_RESET | NO_WP
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
8D extension none
protocols
read 1S-4S-4S
write 1S-1S-4S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
dc (64.0 KiB) [3]
c7 (128 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+---------
00000000-07ffffff | [ 3] | no
$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
$ mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
743a6228f6b523c54ee6670aac049b28b5ba5b70341815d50e5cb5a21d59cb8b spi_read
743a6228f6b523c54ee6670aac049b28b5ba5b70341815d50e5cb5a21d59cb8b spi_test
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
743a6228f6b523c54ee6670aac049b28b5ba5b70341815d50e5cb5a21d59cb8b spi_test
$ mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 134217728 (128M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
drivers/mtd/spi-nor/winbond.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 63a93c9eb9174b073e19c41eeada33b23a99b184..a13a1201eae92233091dde644d590baa57e97046 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -343,6 +343,10 @@ static const struct flash_info winbond_nor_parts[] = {
.id = SNOR_ID(0xef, 0x80, 0x20),
.name = "w25q512nwm",
.otp = SNOR_OTP(256, 3, 0x1000, 0x1000),
+ }, {
+ /* W25Q01NWxxIQ */
+ .id = SNOR_ID(0xef, 0x60, 0x21),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};
--
2.51.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 2/6] mtd: spi-nor: winbond: Add support for W25Q01NWxxIM chips
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
2025-11-05 17:27 ` [PATCH 1/6] mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips Miquel Raynal
@ 2025-11-05 17:27 ` Miquel Raynal
2025-11-05 17:27 ` [PATCH 3/6] mtd: spi-nor: winbond: Add support for W25Q02NWxxIM chips Miquel Raynal
` (7 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:27 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
These chips must be described as none of the block protection
information are discoverable. This chip supports 4 bits plus the
top/bottom addressing capability to identify the protected blocks.
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
cat: can't open '/sys/bus/spi/devices/spi0.0/spi-nor/partname': No such file or directory
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
ef8021
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond
$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060101ff00060110800000ff84000102d00000ffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520fbffffffff3f44eb086b083b42bbfeffffffffff
0000ffff40eb0c200f5210d800003652b50082ea14e2e96376337a757a75
f7bdd55c19f75dffe970f9a5ffffffffffffffffffffffffffffffffff0a
f0ff21ffdcff
$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
d70b64bfa72dad202ff6881f92676b3a79b1e634b60653cd15f1820b7f3acaea /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id ef 80 21 00 00 00
size 128 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | HAS_SR_TB_BIT6 | HAS_4BIT_BP | SOFT_RESET | NO_WP
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
8D extension none
protocols
read 1S-4S-4S
write 1S-1S-4S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
dc (64.0 KiB) [3]
c7 (128 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+---------
00000000-07ffffff | [ 3] | no
$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
$ mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
900fef48fdac362ce15d4608acfd9d733b514751423ae8d26e94036531198fb8 spi_read
900fef48fdac362ce15d4608acfd9d733b514751423ae8d26e94036531198fb8 spi_test
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
900fef48fdac362ce15d4608acfd9d733b514751423ae8d26e94036531198fb8 spi_test
$ mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 134217728 (128M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
drivers/mtd/spi-nor/winbond.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index a13a1201eae92233091dde644d590baa57e97046..580c9cb37958136e7e9fbc71152de55ab008812e 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -347,6 +347,10 @@ static const struct flash_info winbond_nor_parts[] = {
/* W25Q01NWxxIQ */
.id = SNOR_ID(0xef, 0x60, 0x21),
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
+ }, {
+ /* W25Q01NWxxIM */
+ .id = SNOR_ID(0xef, 0x80, 0x21),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};
--
2.51.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 3/6] mtd: spi-nor: winbond: Add support for W25Q02NWxxIM chips
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
2025-11-05 17:27 ` [PATCH 1/6] mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips Miquel Raynal
2025-11-05 17:27 ` [PATCH 2/6] mtd: spi-nor: winbond: Add support for W25Q01NWxxIM chips Miquel Raynal
@ 2025-11-05 17:27 ` Miquel Raynal
2025-11-05 17:27 ` [PATCH 4/6] mtd: spi-nor: winbond: Add support for W25H512NWxxAM chips Miquel Raynal
` (6 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:27 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
These chips must be described as none of the block protection
information are discoverable. This chip supports 4 bits plus the
top/bottom addressing capability to identify the protected blocks.
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
cat: can't open '/sys/bus/spi/devices/spi0.0/spi-nor/partname': No such file or directory
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
ef8022
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond
$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060101ff00060110800000ff84000102d00000ff03000102f000
00ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520fbffffffff7f44eb086b083b42bbfeffffffffff
0000ffff40eb0c200f5210d800003652b50082ea14e2e96376337a757a75
f7a2d55c199148ffe970f8a1ffffffffffffffffffffffffffffffffff0a
f0ff21ffdcff
$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
679145368f2188ac975ec3f4c9b691e7e250147c13b6f18a28a9192700925d95 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id ef 80 22 00 00 00
size 256 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | NO_READ_CR | HAS_SR_TB_BIT6 | HAS_4BIT_BP | SOFT_RESET | NO_WP
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
8D extension none
protocols
read 1S-4S-4S
write 1S-1S-4S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
dc (64.0 KiB) [3]
c7 (256 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+---------
00000000-0fffffff | [ 3] | no
$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
$ mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
5cff8d15609f3eab8d8008699191d5418da5b346e4f98ab67d5d89702b584042 spi_read
5cff8d15609f3eab8d8008699191d5418da5b346e4f98ab67d5d89702b584042 spi_test
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
5cff8d15609f3eab8d8008699191d5418da5b346e4f98ab67d5d89702b584042 spi_test
$ mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 268435456 (256M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
drivers/mtd/spi-nor/winbond.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 580c9cb37958136e7e9fbc71152de55ab008812e..a65cbbccbbac64c83227c8158ff85abfa3441868 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -351,6 +351,10 @@ static const struct flash_info winbond_nor_parts[] = {
/* W25Q01NWxxIM */
.id = SNOR_ID(0xef, 0x80, 0x21),
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
+ }, {
+ /* W25Q02NWxxIM */
+ .id = SNOR_ID(0xef, 0x80, 0x22),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};
--
2.51.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 4/6] mtd: spi-nor: winbond: Add support for W25H512NWxxAM chips
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (2 preceding siblings ...)
2025-11-05 17:27 ` [PATCH 3/6] mtd: spi-nor: winbond: Add support for W25Q02NWxxIM chips Miquel Raynal
@ 2025-11-05 17:27 ` Miquel Raynal
2025-11-05 17:27 ` [PATCH 5/6] mtd: spi-nor: winbond: Add support for W25H01NWxxAM chips Miquel Raynal
` (5 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:27 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
These chips must be described as none of the block protection
information are discoverable. This chip supports 4 bits plus the
top/bottom addressing capability to identify the protected blocks.
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
cat: can't open '/sys/bus/spi/devices/spi0.0/spi-nor/partname': No such file or directory
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
efa020
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond
$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060101ff00060110800000ff84000102d00000ffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520fbffffffff1f44eb086b083b42bbfeffffffffff
0000ffff40eb0c200f5210d800003302a60081e714d9e96376337a757a75
f7bdd55c19f75dffe970f9a5ffffffffffffffffffffffffffffffffff0a
f0ff21ffdcff
$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
07b7eff0cc6e637cbe3282c0ee75bd23e0da622ca26319238c07bcb4d677fb34 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id ef a0 20 00 00 00
size 64.0 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | HAS_SR_TB_BIT6 | HAS_4BIT_BP | SOFT_RESET | NO_WP
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
8D extension none
protocols
read 1S-4S-4S
write 1S-1S-4S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
dc (64.0 KiB) [3]
c7 (64.0 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+---------
00000000-03ffffff | [ 3] | no
$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
$ mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
40a9f42f218c8f909eb9f13e5edb964be55d5a962a91ad54f6b1dcf51ca637ad spi_read
40a9f42f218c8f909eb9f13e5edb964be55d5a962a91ad54f6b1dcf51ca637ad spi_test
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
40a9f42f218c8f909eb9f13e5edb964be55d5a962a91ad54f6b1dcf51ca637ad spi_test
$ mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 67108864 (64M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
drivers/mtd/spi-nor/winbond.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index a65cbbccbbac64c83227c8158ff85abfa3441868..781ca0abfcdca2dc883e33bfa5c164623cf0905d 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -355,6 +355,10 @@ static const struct flash_info winbond_nor_parts[] = {
/* W25Q02NWxxIM */
.id = SNOR_ID(0xef, 0x80, 0x22),
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
+ }, {
+ /* W25H512NWxxAM */
+ .id = SNOR_ID(0xef, 0xa0, 0x20),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};
--
2.51.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 5/6] mtd: spi-nor: winbond: Add support for W25H01NWxxAM chips
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (3 preceding siblings ...)
2025-11-05 17:27 ` [PATCH 4/6] mtd: spi-nor: winbond: Add support for W25H512NWxxAM chips Miquel Raynal
@ 2025-11-05 17:27 ` Miquel Raynal
2025-11-05 17:27 ` [PATCH 6/6] mtd: spi-nor: winbond: Add support for W25H02NWxxAM chips Miquel Raynal
` (4 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:27 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
These chips must be described as none of the block protection
information are discoverable. This chip supports 4 bits plus the
top/bottom addressing capability to identify the protected blocks.
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
cat: can't open '/sys/bus/spi/devices/spi0.0/spi-nor/partname': No such file or directory
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
efa021
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond
$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060101ff00060110800000ff84000102d00000ffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520fbffffffff3f44eb086b083b42bbfeffffffffff
0000ffff40eb0c200f5210d800003652b50082ea14e2e96376337a757a75
f7bdd55c19f75dffe970f9a5ffffffffffffffffffffffffffffffffff0a
f0ff21ffdcff
$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
d70b64bfa72dad202ff6881f92676b3a79b1e634b60653cd15f1820b7f3acaea /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id ef a0 21 00 00 00
size 128 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | HAS_SR_TB_BIT6 | HAS_4BIT_BP | SOFT_RESET | NO_WP
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
8D extension none
protocols
read 1S-4S-4S
write 1S-1S-4S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
dc (64.0 KiB) [3]
c7 (128 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+---------
00000000-07ffffff | [ 3] | no
$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
$ mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
a2cab5130668ecf92f4da32cbc2ab7be5e6db03ff36972775822f56e324d5122 spi_read
a2cab5130668ecf92f4da32cbc2ab7be5e6db03ff36972775822f56e324d5122 spi_test
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
a2cab5130668ecf92f4da32cbc2ab7be5e6db03ff36972775822f56e324d5122 spi_test
$ mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 134217728 (128M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
drivers/mtd/spi-nor/winbond.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 781ca0abfcdca2dc883e33bfa5c164623cf0905d..338e44db506a819b15e21f312c06ec13e6d37d28 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -359,6 +359,10 @@ static const struct flash_info winbond_nor_parts[] = {
/* W25H512NWxxAM */
.id = SNOR_ID(0xef, 0xa0, 0x20),
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
+ }, {
+ /* W25H01NWxxAM */
+ .id = SNOR_ID(0xef, 0xa0, 0x21),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};
--
2.51.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* [PATCH 6/6] mtd: spi-nor: winbond: Add support for W25H02NWxxAM chips
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (4 preceding siblings ...)
2025-11-05 17:27 ` [PATCH 5/6] mtd: spi-nor: winbond: Add support for W25H01NWxxAM chips Miquel Raynal
@ 2025-11-05 17:27 ` Miquel Raynal
2025-11-05 17:31 ` [PATCH 0/6] Hello, Miquel Raynal
` (3 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:27 UTC (permalink / raw)
To: Tudor Ambarus, Pratyush Yadav, Michael Walle, Miquel Raynal,
Richard Weinberger, Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
These chips must be described as none of the block protection
information are discoverable. This chip supports 4 bits plus the
top/bottom addressing capability to identify the protected blocks.
Cc: stable@vger.kernel.org
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
---
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/partname
cat: can't open '/sys/bus/spi/devices/spi0.0/spi-nor/partname': No such file or directory
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/jedec_id
efa022
$ cat /sys/bus/spi/devices/spi0.0/spi-nor/manufacturer
winbond
$ xxd -p /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
53464450060101ff00060110800000ff84000102d00000ff03000102f000
00ffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff
ffffffffffffffffe520fbffffffff7f44eb086b083b42bbfeffffffffff
0000ffff40eb0c200f5210d800003652b50082ea14e2e96376337a757a75
f7a2d55c199148ffe970f8a1ffffffffffffffffffffffffffffffffff0a
f0ff21ffdcff
$ sha256sum /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
679145368f2188ac975ec3f4c9b691e7e250147c13b6f18a28a9192700925d95 /sys/bus/spi/devices/spi0.0/spi-nor/sfdp
$ cat /sys/kernel/debug/spi-nor/spi0.0/params
name (null)
id ef a0 22 00 00 00
size 256 MiB
write size 1
page size 256
address nbytes 4
flags HAS_SR_TB | 4B_OPCODES | HAS_4BAIT | HAS_LOCK | HAS_16BIT_SR | NO_READ_CR | HAS_SR_TB_BIT6 | HAS_4BIT_BP | SOFT_RESET | NO_WP
opcodes
read 0xec
dummy cycles 6
erase 0xdc
program 0x34
8D extension none
protocols
read 1S-4S-4S
write 1S-1S-4S
register 1S-1S-1S
erase commands
21 (4.00 KiB) [1]
dc (64.0 KiB) [3]
c7 (256 MiB)
sector map
region (in hex) | erase mask | overlaid
------------------+------------+---------
00000000-0fffffff | [ 3] | no
$ cat /sys/kernel/debug/spi-nor/spi0.0/capabilities
Supported read modes by the flash
1S-1S-1S
opcode 0x13
mode cycles 0
dummy cycles 0
1S-1S-2S
opcode 0x3c
mode cycles 0
dummy cycles 8
1S-2S-2S
opcode 0xbc
mode cycles 2
dummy cycles 2
1S-1S-4S
opcode 0x6c
mode cycles 0
dummy cycles 8
1S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 4
4S-4S-4S
opcode 0xec
mode cycles 2
dummy cycles 0
Supported page program modes by the flash
1S-1S-1S
opcode 0x12
1S-1S-4S
opcode 0x34
$ dd if=/dev/urandom of=./spi_test bs=1M count=2
2+0 records in
2+0 records out
$ mtd_debug erase /dev/mtd0 0 2097152
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ hexdump spi_read
0000000 ffff ffff ffff ffff ffff ffff ffff ffff
*
0200000
$ sha256sum spi_read
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
$ mtd_debug write /dev/mtd0 0 2097152 spi_test
Copied 2097152 bytes from spi_test to address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
0f59f02ed36e0c9a0c075787e27175d3428ac008be71c2322dcaf9000ef1e324 spi_read
0f59f02ed36e0c9a0c075787e27175d3428ac008be71c2322dcaf9000ef1e324 spi_test
$ mtd_debug erase /dev/mtd0 0 2097152
mtd_debug read /dev/mtd0 0 2097152 spi_read
Erased 2097152 bytes from address 0x00000000 in flash
$ mtd_debug read /dev/mtd0 0 2097152 spi_read
sha256sum spi*
Copied 2097152 bytes from address 0x00000000 in flash to spi_read
$ sha256sum spi*
4bda3a28f4ffe603c0ec1258c0034d65a1a0d35ab7bd523a834608adabf03cc5 spi_read
0f59f02ed36e0c9a0c075787e27175d3428ac008be71c2322dcaf9000ef1e324 spi_test
$ mtd_debug info /dev/mtd0
mtd.type = MTD_NORFLASH
mtd.flags = MTD_CAP_NORFLASH
mtd.size = 268435456 (256M)
mtd.erasesize = 65536 (64K)
mtd.writesize = 1
mtd.oobsize = 0
regions = 0
---
drivers/mtd/spi-nor/winbond.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/drivers/mtd/spi-nor/winbond.c b/drivers/mtd/spi-nor/winbond.c
index 338e44db506a819b15e21f312c06ec13e6d37d28..fb855fe44733db5664c200520d19a6be33edc323 100644
--- a/drivers/mtd/spi-nor/winbond.c
+++ b/drivers/mtd/spi-nor/winbond.c
@@ -363,6 +363,10 @@ static const struct flash_info winbond_nor_parts[] = {
/* W25H01NWxxAM */
.id = SNOR_ID(0xef, 0xa0, 0x21),
.flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
+ }, {
+ /* W25H02NWxxAM */
+ .id = SNOR_ID(0xef, 0xa0, 0x22),
+ .flags = SPI_NOR_HAS_LOCK | SPI_NOR_HAS_TB | SPI_NOR_TB_SR_BIT6 | SPI_NOR_4BIT_BP,
},
};
--
2.51.0
^ permalink raw reply related [flat|nested] 14+ messages in thread* Re: [PATCH 0/6] Hello,
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (5 preceding siblings ...)
2025-11-05 17:27 ` [PATCH 6/6] mtd: spi-nor: winbond: Add support for W25H02NWxxAM chips Miquel Raynal
@ 2025-11-05 17:31 ` Miquel Raynal
2025-11-06 8:30 ` Michael Walle
` (2 subsequent siblings)
9 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-05 17:31 UTC (permalink / raw)
To: Tudor Ambarus
Cc: Pratyush Yadav, Michael Walle, Richard Weinberger,
Vignesh Raghavendra, Thomas Petazzoni, Steam Lin, linux-mtd,
linux-kernel, stable
Hello,
On 05/11/2025 at 18:26:59 +01, Miquel Raynal <miquel.raynal@bootlin.com> wrote:
> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
> these chips is needed otherwise the block protection feature is not
> available. Everything else looks fine otherwise.
[...]
Sorry for messing up a bit the cover letter, I didn't pay enough
attention my first line got taken by b4 as Subject and forgot to put a
real title.
Subject should have been:
"mtd: spi-nor: winbond: Support for chips with block protection capabilities"
This will be fixed in case we need a v2.
Cheers,
Miquèl
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/6] Hello,
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (6 preceding siblings ...)
2025-11-05 17:31 ` [PATCH 0/6] Hello, Miquel Raynal
@ 2025-11-06 8:30 ` Michael Walle
2025-11-06 15:59 ` Pratyush Yadav
2025-11-10 6:54 ` Tudor Ambarus
9 siblings, 0 replies; 14+ messages in thread
From: Michael Walle @ 2025-11-06 8:30 UTC (permalink / raw)
To: Miquel Raynal, Tudor Ambarus, Pratyush Yadav, Richard Weinberger,
Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable
On Wed Nov 5, 2025 at 6:26 PM CET, Miquel Raynal wrote:
> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
> these chips is needed otherwise the block protection feature is not
> available. Everything else looks fine otherwise.
>
> In practice I am only adding 6 very similar IDs but I split the commits
> because the amount of meta data to show proof that all the chips have
> been tested and work is pretty big.
>
> As the commits simply add an ID, I am Cc'ing stable with the hope to
> get these backported to LTS kernels as allowed by the stable rules (see
> link below, but I hope I am doing this right).
>
> Link: https://elixir.bootlin.com/linux/v6.17.7/source/Documentation/process/stable-kernel-rules.rst#L15
>
> Thanks,
> Miquèl
>
> ---
> Miquel Raynal (6):
> mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips
> mtd: spi-nor: winbond: Add support for W25Q01NWxxIM chips
> mtd: spi-nor: winbond: Add support for W25Q02NWxxIM chips
> mtd: spi-nor: winbond: Add support for W25H512NWxxAM chips
> mtd: spi-nor: winbond: Add support for W25H01NWxxAM chips
> mtd: spi-nor: winbond: Add support for W25H02NWxxAM chips
Nice, for the whole series:
Reviewed-by: Michael Walle <mwalle@kernel.org>
-michael
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/6] Hello,
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (7 preceding siblings ...)
2025-11-06 8:30 ` Michael Walle
@ 2025-11-06 15:59 ` Pratyush Yadav
2025-11-10 6:54 ` Tudor Ambarus
9 siblings, 0 replies; 14+ messages in thread
From: Pratyush Yadav @ 2025-11-06 15:59 UTC (permalink / raw)
To: Miquel Raynal
Cc: Tudor Ambarus, Pratyush Yadav, Michael Walle, Richard Weinberger,
Vignesh Raghavendra, Thomas Petazzoni, Steam Lin, linux-mtd,
linux-kernel, stable
On Wed, Nov 05 2025, Miquel Raynal wrote:
> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
> these chips is needed otherwise the block protection feature is not
> available. Everything else looks fine otherwise.
>
> In practice I am only adding 6 very similar IDs but I split the commits
> because the amount of meta data to show proof that all the chips have
> been tested and work is pretty big.
>
> As the commits simply add an ID, I am Cc'ing stable with the hope to
> get these backported to LTS kernels as allowed by the stable rules (see
> link below, but I hope I am doing this right).
>
> Link: https://elixir.bootlin.com/linux/v6.17.7/source/Documentation/process/stable-kernel-rules.rst#L15
>
> Thanks,
> Miquèl
>
> ---
> Miquel Raynal (6):
> mtd: spi-nor: winbond: Add support for W25Q01NWxxIQ chips
> mtd: spi-nor: winbond: Add support for W25Q01NWxxIM chips
> mtd: spi-nor: winbond: Add support for W25Q02NWxxIM chips
> mtd: spi-nor: winbond: Add support for W25H512NWxxAM chips
> mtd: spi-nor: winbond: Add support for W25H01NWxxAM chips
> mtd: spi-nor: winbond: Add support for W25H02NWxxAM chips
>
> drivers/mtd/spi-nor/winbond.c | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> ---
> base-commit: 479ba7fc704936b74a91ee352fe113d6391d562f
> change-id: 20251105-winbond-v6-18-rc1-spi-nor-7f78cb2785d6
>
> Best regards,
Applied to spi-nor/next. Thanks!
--
Regards,
Pratyush Yadav
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/6] Hello,
2025-11-05 17:26 [PATCH 0/6] Hello, Miquel Raynal
` (8 preceding siblings ...)
2025-11-06 15:59 ` Pratyush Yadav
@ 2025-11-10 6:54 ` Tudor Ambarus
2025-11-12 9:35 ` Miquel Raynal
9 siblings, 1 reply; 14+ messages in thread
From: Tudor Ambarus @ 2025-11-10 6:54 UTC (permalink / raw)
To: Miquel Raynal, Pratyush Yadav, Michael Walle, Richard Weinberger,
Vignesh Raghavendra
Cc: Thomas Petazzoni, Steam Lin, linux-mtd, linux-kernel, stable,
Sean Anderson
Hi, Miquel,
On 11/5/25 7:26 PM, Miquel Raynal wrote:
> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
> these chips is needed otherwise the block protection feature is not
> available. Everything else looks fine otherwise.
I'm glad to see this, you're an locking expert now :). Do you care to
extend the SPI NOR testing requirements [1] with steps on how to test the
locking? There's some testing proposed at [2], would you please check and
review it?
Thanks!
ta
[1] https://docs.kernel.org/driver-api/mtd/spi-nor.html#minimum-testing-requirements
[2] https://lore.kernel.org/linux-mtd/92e99a96-5582-48a5-a4f9-e9b33fcff171@linux.dev/
^ permalink raw reply [flat|nested] 14+ messages in thread* Re: [PATCH 0/6] Hello,
2025-11-10 6:54 ` Tudor Ambarus
@ 2025-11-12 9:35 ` Miquel Raynal
2025-11-12 9:37 ` Tudor Ambarus
0 siblings, 1 reply; 14+ messages in thread
From: Miquel Raynal @ 2025-11-12 9:35 UTC (permalink / raw)
To: Tudor Ambarus
Cc: Pratyush Yadav, Michael Walle, Richard Weinberger,
Vignesh Raghavendra, Thomas Petazzoni, Steam Lin, linux-mtd,
linux-kernel, stable, Sean Anderson
On 10/11/2025 at 08:54:24 +02, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
> Hi, Miquel,
>
> On 11/5/25 7:26 PM, Miquel Raynal wrote:
>> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
>> these chips is needed otherwise the block protection feature is not
>> available. Everything else looks fine otherwise.
>
> I'm glad to see this, you're an locking expert now :). Do you care to
> extend the SPI NOR testing requirements [1] with steps on how to test the
> locking? There's some testing proposed at [2], would you please check and
> review it?
Good idea. Let me have a loot at what Sean proposed.
> [1] https://docs.kernel.org/driver-api/mtd/spi-nor.html#minimum-testing-requirements
> [2] https://lore.kernel.org/linux-mtd/92e99a96-5582-48a5-a4f9-e9b33fcff171@linux.dev/
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/6] Hello,
2025-11-12 9:35 ` Miquel Raynal
@ 2025-11-12 9:37 ` Tudor Ambarus
2025-11-14 17:59 ` Miquel Raynal
0 siblings, 1 reply; 14+ messages in thread
From: Tudor Ambarus @ 2025-11-12 9:37 UTC (permalink / raw)
To: Miquel Raynal
Cc: Pratyush Yadav, Michael Walle, Richard Weinberger,
Vignesh Raghavendra, Thomas Petazzoni, Steam Lin, linux-mtd,
linux-kernel, stable, Sean Anderson
On 11/12/25 11:35 AM, Miquel Raynal wrote:
> On 10/11/2025 at 08:54:24 +02, Tudor Ambarus <tudor.ambarus@linaro.org> wrote:
>
>> Hi, Miquel,
>>
>> On 11/5/25 7:26 PM, Miquel Raynal wrote:
>>> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
>>> these chips is needed otherwise the block protection feature is not
>>> available. Everything else looks fine otherwise.
>>
>> I'm glad to see this, you're an locking expert now :). Do you care to
>> extend the SPI NOR testing requirements [1] with steps on how to test the
>> locking? There's some testing proposed at [2], would you please check and
>> review it?
>
> Good idea. Let me have a loot at what Sean proposed.
I proposed to him as well to update the testing requirements if he cares,
he said he'll take a look. Sync with him please.
Cheers,
ta
>
>> [1] https://docs.kernel.org/driver-api/mtd/spi-nor.html#minimum-testing-requirements
>> [2] https://lore.kernel.org/linux-mtd/92e99a96-5582-48a5-a4f9-e9b33fcff171@linux.dev/
>
> Thanks,
> Miquèl
^ permalink raw reply [flat|nested] 14+ messages in thread
* Re: [PATCH 0/6] Hello,
2025-11-12 9:37 ` Tudor Ambarus
@ 2025-11-14 17:59 ` Miquel Raynal
0 siblings, 0 replies; 14+ messages in thread
From: Miquel Raynal @ 2025-11-14 17:59 UTC (permalink / raw)
To: Tudor Ambarus
Cc: Pratyush Yadav, Michael Walle, Richard Weinberger,
Vignesh Raghavendra, Thomas Petazzoni, Steam Lin, linux-mtd,
linux-kernel, stable, Sean Anderson
Hello,
>>>> Here is a series adding support for 6 Winbond SPI NOR chips. Describing
>>>> these chips is needed otherwise the block protection feature is not
>>>> available. Everything else looks fine otherwise.
>>>
>>> I'm glad to see this, you're an locking expert now :). Do you care to
>>> extend the SPI NOR testing requirements [1] with steps on how to test the
>>> locking? There's some testing proposed at [2], would you please check and
>>> review it?
>>
>> Good idea. Let me have a loot at what Sean proposed.
>
> I proposed to him as well to update the testing requirements if he cares,
> he said he'll take a look. Sync with him please.
>
> Cheers,
> ta
>
>>
>>> [1] https://docs.kernel.org/driver-api/mtd/spi-nor.html#minimum-testing-requirements
>>> [2] https://lore.kernel.org/linux-mtd/92e99a96-5582-48a5-a4f9-e9b33fcff171@linux.dev/
For people who would like to follow, the proposal is here:
https://lore.kernel.org/linux-mtd/20251114-winbond-v6-18-rc1-spi-nor-swp-v1-0-487bc7129931@bootlin.com/T/#mbae8b874181eb0401b30142f423b73b6389a0c54
Thanks,
Miquèl
^ permalink raw reply [flat|nested] 14+ messages in thread