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Tue, 9 Dec 2025 03:52:47 -0600 Received: from [172.24.21.18] (ltpw0bk3wf.dhcp.ti.com [172.24.21.18]) by lelvem-mr05.itg.ti.com (8.18.1/8.18.1) with ESMTP id 5B99qiZ51012689; Tue, 9 Dec 2025 03:52:44 -0600 Message-ID: Date: Tue, 9 Dec 2025 15:22:43 +0530 Precedence: bulk X-Mailing-List: stable@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH] spi: cadence-quadspi: Fix clock enable underflows due to runtime PM From: "Dutta, Anurag" To: Mark Brown CC: Nishanth Menon , Francesco Dolcini , Siddharth Vadapalli , , , , "Gujulan Elango, Hari Prasath" , "Kumar, Udit" References: <20251202-spi-cadence-qspi-runtime-pm-imbalance-v1-1-aee8c7fa21f2@kernel.org> <555e9f6b-b8b6-4cc5-900b-63aaff8b4e6c@sirena.org.uk> <20251204140530.xax5didvuc7auzcd@problem> <4d6b857e-4bfe-45ef-a428-6e92f218f0c5@sirena.org.uk> <2fcf5235-cc94-4202-9164-4889356c5264@sirena.org.uk> <5525272e-7220-4352-bb08-ac66631108e0@ti.com> Content-Language: en-US In-Reply-To: <5525272e-7220-4352-bb08-ac66631108e0@ti.com> Content-Type: text/plain; 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X-OriginatorOrg: ti.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Dec 2025 09:52:48.9115 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 4278405a-5297-40a7-8d97-08de3708b63c X-MS-Exchange-CrossTenant-Id: e5b49634-450b-4709-8abb-1e2b19b982b7 X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com] X-MS-Exchange-CrossTenant-AuthSource: DS3PEPF000099E0.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV3PR10MB7983 On 09-12-2025 11:13, Dutta, Anurag wrote: > > On 05-12-2025 18:55, Mark Brown wrote: >> On Fri, Dec 05, 2025 at 06:28:06PM +0530, Dutta, Anurag wrote: >> >>> Hi Mark and Nishanth The below seems to work for me on j721e. Let me >>> know >>> your thoughts. >>> Also, the error actually comes from : >>> if (cqspi->use_direct_mode) { >>>      ret = cqspi_request_mmap_dma(cqspi); >>>      if (ret == -EPROBE_DEFER) >>>      goto probe_setup_failed; >>> } >>> And not from flash_setup(). >> Great, thanks for confirming.  We should probably ensure that has some >> logging... >> >>> @@ -2024,7 +2024,7 @@ static int cqspi_probe(struct platform_device >>> *pdev) >>>   probe_reset_failed: >>>          if (cqspi->is_jh7110) >>>                  cqspi_jh7110_disable_clk(pdev, cqspi); >>> -       clk_disable_unprepare(cqspi->clk); >>> +       pm_runtime_force_suspend(dev); >>>   probe_clk_failed: >> The trouble with that is that in the !CONFIG_PM case >> pm_runtime_force_suspend() is defined as: >> >>    static inline int pm_runtime_force_suspend(struct device *dev) { >> return 0; } >> >> so we'll leak the clock enable.  If we could just require runtime PM >> this would be an awful lot easier to deal with. > So, can we maintain an internal state of the clock(enabled/disabled) > in the  struct cqspi_st ? > Before every, clk_disable_unprepare()/clk_prepare_enable(), we check > if the clock is actually > enabled/disabled by checking the state of "atomic_t clock_enabled" > within struct cqspi_st. > And, when we do clk_disable_unprepare()/clk_prepare_enable(), we set > the value of clock_enabled > accordingly. > > Is this a good approach, given we take care of race conditions as well ? > > Another solution : diff --git a/drivers/spi/spi-cadence-quadspi.c b/drivers/spi/spi-cadence-quadspi.c index af6d050da1c8..4d298b945f09 100644 --- a/drivers/spi/spi-cadence-quadspi.c +++ b/drivers/spi/spi-cadence-quadspi.c @@ -2024,7 +2024,11 @@ static int cqspi_probe(struct platform_device *pdev)  probe_reset_failed:         if (cqspi->is_jh7110)                 cqspi_jh7110_disable_clk(pdev, cqspi); -       clk_disable_unprepare(cqspi->clk); + +       if (!(ddata && (ddata->quirks & CQSPI_DISABLE_RUNTIME_PM))) { +               if (pm_runtime_get_sync(&pdev->dev) >= 0) +                       clk_disable_unprepare(cqspi->clk); +       }  probe_clk_failed:         return ret;  } pm_runtime_get_sync() will increment the usage count thereby preventing from runtime_suspend() getting invoked, thereby preventing double clock_disable() This will work for !CONFIG_PM as well because pm_runtime_get_sync() will return 1 then. and the runtime_suspend() is never going to be invoked. logs : with CONFIG_PM : https://gist.github.com/anuragdutta731/c0080a7592de992e71103e9947639b2a without CONFIG_PM : https://gist.github.com/anuragdutta731/f9a79302b65088d53db2c970b6b8eff0 It work for both cases on j721e. Please share your thoughts. Regards Anurag