[PATCH v3 0/2] usb: dwc3: Properly update ep0 for IN direction

[PATCH v3 0/2] usb: dwc3: Properly update ep0 for IN direction

[Thinh Nguyen]

This patch series fixes an issue with HS/FS 3-stage control read transfer where
DWC3 incorrectly check when to send ZLP.

Changes in v3:
 - Add 'Fixes:' tags
 - Minor update to commit message for clarity

Changes in v2:
 - Separate from "usb: dwc3: Add new updates for DWC_usb31" patch series
 - Add 'Cc' to stable mailing list


Thinh Nguyen (2):
  usb: dwc3: gadget: Set maxpacket size for ep0 IN
  usb: dwc3: ep0: Reset TRB counter for ep0 IN

 drivers/usb/dwc3/ep0.c    | 7 ++++++-
 drivers/usb/dwc3/gadget.c | 2 ++
 2 files changed, 8 insertions(+), 1 deletion(-)

-- 
2.11.0

[PATCH v3 1/2] usb: dwc3: gadget: Set maxpacket size for ep0 IN

[Thinh Nguyen]

There are 2 control endpoint structures for DWC3. However, the driver
only updates the OUT direction control endpoint structure during
ConnectDone event. DWC3 driver needs to update the endpoint max packet
size for control IN endpoint as well. If the max packet size is not
properly set, then the driver will incorrectly calculate the data
transfer size and fail to send ZLP for HS/FS 3-stage control read
transfer.

The fix is simply to update the max packet size for the ep0 IN direction
during ConnectDone event.

Cc: stable@vger.kernel.org
Fixes: 72246da40f37 ("usb: Introduce DesignWare USB3 DRD Driver")
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
---
 drivers/usb/dwc3/gadget.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c
index 639dd1b163a0..21abea0ac622 100644
--- a/drivers/usb/dwc3/gadget.c
+++ b/drivers/usb/dwc3/gadget.c
@@ -2744,6 +2744,8 @@ static void dwc3_gadget_conndone_interrupt(struct dwc3 *dwc)
 		break;
 	}
 
+	dwc->eps[1]->endpoint.maxpacket = dwc->gadget.ep0->maxpacket;
+
 	/* Enable USB2 LPM Capability */
 
 	if ((dwc->revision > DWC3_REVISION_194A) &&
-- 
2.11.0

[PATCH v3 2/2] usb: dwc3: ep0: Reset TRB counter for ep0 IN

[Thinh Nguyen]

DWC3 tracks TRB counter for each ep0 direction separately. In control
read transfer completion handler, the driver needs to reset the TRB
enqueue counter for ep0 IN direction. Currently the driver only resets
the TRB counter for control OUT endpoint. Check for the data direction
and properly reset the TRB counter from correct control endpoint.

Cc: stable@vger.kernel.org
Fixes: c2da2ff00606 ("usb: dwc3: ep0: don't use ep0in for transfers")
Signed-off-by: Thinh Nguyen <thinhn@synopsys.com>
---
 drivers/usb/dwc3/ep0.c | 7 ++++++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/usb/dwc3/ep0.c b/drivers/usb/dwc3/ep0.c
index fd3e7ad2eb0e..618b4260f0d9 100644
--- a/drivers/usb/dwc3/ep0.c
+++ b/drivers/usb/dwc3/ep0.c
@@ -858,7 +858,12 @@ static void dwc3_ep0_complete_data(struct dwc3 *dwc,
 		trb++;
 		trb->ctrl &= ~DWC3_TRB_CTRL_HWO;
 		trace_dwc3_complete_trb(ep0, trb);
-		ep0->trb_enqueue = 0;
+
+		if (r->direction)
+			dwc->eps[1]->trb_enqueue = 0;
+		else
+			dwc->eps[0]->trb_enqueue = 0;
+
 		dwc->ep0_bounced = false;
 	}
 
-- 
2.11.0