From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by smtp.lore.kernel.org (Postfix) with ESMTP id E4765C433EF for ; Mon, 18 Jul 2022 13:45:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S235000AbiGRNpa (ORCPT ); Mon, 18 Jul 2022 09:45:30 -0400 Received: from lindbergh.monkeyblade.net ([23.128.96.19]:40200 "EHLO lindbergh.monkeyblade.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S235046AbiGRNp2 (ORCPT ); Mon, 18 Jul 2022 09:45:28 -0400 Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by lindbergh.monkeyblade.net (Postfix) with ESMTPS id D8B2A192A7; Mon, 18 Jul 2022 06:45:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1658151927; x=1689687927; h=message-id:date:mime-version:subject:to:cc:references: from:in-reply-to:content-transfer-encoding; bh=lWXZGlmG3SNmi4VM7l9EBpLyUGbO7uiW4f5tn6p4HqY=; b=BIWRsmBRLLvZCVZ5emoiLcvhwIQlseviNBv4II8DwCjrhWR8TZYtCYwB MonB1TDMGHM5AT50klrRbbIi5aCXJgapG1VDKSK/XmGe7ZMDuJpe/sCzU cl2T9NjbBvemxHu+0zkGYvJAdtTZfYDzASvjZ6MgtZTX+GeHJwRVy2cyD aWfNJN6BI8ED7qlavIOpng6PCq85auqKfAH2+bvmZhkCiskeQiLj24oce KeDv43btNdWxpJ5AoTCrYNR7UxHA/Tg8Wsw1i9MGbR/a2GkQjlijU0JMH WzI1pP5v69oXCNcziZ3zsp4elSQu3h00RPQSUgyQwvvEwpeb4dx0sEqgm A==; X-IronPort-AV: E=McAfee;i="6400,9594,10411"; a="350183604" X-IronPort-AV: E=Sophos;i="5.92,281,1650956400"; d="scan'208";a="350183604" Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jul 2022 06:45:27 -0700 X-IronPort-AV: E=Sophos;i="5.92,281,1650956400"; d="scan'208";a="686739692" Received: from smyint-mobl1.amr.corp.intel.com (HELO [10.212.107.15]) ([10.212.107.15]) by fmsmga003-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 18 Jul 2022 06:45:24 -0700 Message-ID: Date: Mon, 18 Jul 2022 14:45:22 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.10.0 Subject: Re: [PATCH v2 05/21] drm/i915/gt: Skip TLB invalidations once wedged Content-Language: en-US To: Mauro Carvalho Chehab Cc: Chris Wilson , Andi Shyti , Daniel Vetter , Daniele Ceraolo Spurio , Dave Airlie , David Airlie , Jani Nikula , Joonas Lahtinen , Lucas De Marchi , Matt Roper , Rodrigo Vivi , dri-devel@lists.freedesktop.org, intel-gfx@lists.freedesktop.org, linux-kernel@vger.kernel.org, stable@vger.kernel.org, Fei Yang , =?UTF-8?Q?Thomas_Hellstr=c3=b6m?= References: From: Tvrtko Ursulin Organization: Intel Corporation UK Plc In-Reply-To: Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit Precedence: bulk List-ID: X-Mailing-List: stable@vger.kernel.org On 14/07/2022 13:06, Mauro Carvalho Chehab wrote: > From: Chris Wilson > > Skip all further TLB invalidations once the device is wedged and > had been reset, as, on such cases, it can no longer process instructions > on the GPU and the user no longer has access to the TLB's in each engine. > > That helps to reduce the performance regression introduced by TLB > invalidate logic. > > Cc: stable@vger.kernel.org > Fixes: 7938d61591d3 ("drm/i915: Flush TLBs before releasing backing store") Is the claim of a performance regression this solved based on a wedged GPU which does not work any more to the extend where mmio tlb invalidation requests keep timing out? If so please clarify in the commit text and then it looks good to me. Even if it is IMO a very borderline situation to declare something a fix. Regards, Tvrtko > Signed-off-by: Chris Wilson > Cc: Fei Yang > Cc: Andi Shyti > Acked-by: Thomas Hellström > Signed-off-by: Mauro Carvalho Chehab > --- > > To avoid mailbombing on a large number of people, only mailing lists were C/C on the cover. > See [PATCH v2 00/21] at: https://lore.kernel.org/all/cover.1657800199.git.mchehab@kernel.org/ > > drivers/gpu/drm/i915/gt/intel_gt.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/drivers/gpu/drm/i915/gt/intel_gt.c b/drivers/gpu/drm/i915/gt/intel_gt.c > index 1d84418e8676..5c55a90672f4 100644 > --- a/drivers/gpu/drm/i915/gt/intel_gt.c > +++ b/drivers/gpu/drm/i915/gt/intel_gt.c > @@ -934,6 +934,9 @@ void intel_gt_invalidate_tlbs(struct intel_gt *gt) > if (I915_SELFTEST_ONLY(gt->awake == -ENODEV)) > return; > > + if (intel_gt_is_wedged(gt)) > + return; > + > if (GRAPHICS_VER(i915) == 12) { > regs = gen12_regs; > num = ARRAY_SIZE(gen12_regs);