From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-pf0-f178.google.com ([209.85.192.178]:33181 "EHLO mail-pf0-f178.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753970AbcINRxv (ORCPT ); Wed, 14 Sep 2016 13:53:51 -0400 Subject: Re: [PATCH] arc: perf: Enable generic "cache-references" and "cache-misses" events To: Alexey Brodkin , "linux-kernel@vger.kernel.org" , Peter Zijlstra References: <1472125647-518-1-git-send-email-abrodkin@synopsys.com> <6074e252-6e18-bb01-4de1-023bd7e82f03@synopsys.com> Cc: Arnaldo Carvalho de Melo , Thomas Gleixner , "linux-snps-arc@lists.infradead.org" , "stable@vger.kernel.org" From: Vineet Gupta Message-ID: Date: Wed, 14 Sep 2016 10:53:48 -0700 MIME-Version: 1.0 In-Reply-To: <6074e252-6e18-bb01-4de1-023bd7e82f03@synopsys.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit Sender: stable-owner@vger.kernel.org List-ID: On 08/26/2016 10:30 AM, Vineet Gupta wrote: > On 08/25/2016 04:49 AM, Alexey Brodkin wrote: >> ... >> [PERF_COUNT_ARC_EDTLB] = "edtlb", /* D-TLB Miss */ >> [PERF_COUNT_ARC_EITLB] = "eitlb", /* I-TLB Miss */ >> + >> + [PERF_COUNT_HW_CACHE_REFERENCES] = "imemrdc", /* Instr: mem read cached */ >> + [PERF_COUNT_HW_CACHE_MISSES] = "dclm", /* D-cache Load Miss */ > > I think this is duplicating a mistake we already have. I vaguely remember when > doing some hackbench profiling last year with range based profiling confined to > memset routine and saw that L1-dcache-misses was counting zero. This is because it > only counts LD misses while memset only does ST. So given that this is the best we got, I'm going to merge this anyways. -Vineet > > Performance counter stats for '/sbin/hackbench': > > 0 L1-dcache-misses > 0 L1-dcache-load-misses > 1846082 L1-dcache-store-misses > > > @PeterZ do you concur that is wrong and we ought to setup 2 counters to do this > correctly ? > > -Vineet >