* [PATCH 0/4] arm64: dts: qcom: support SDM845 HDK
@ 2026-02-17 21:20 Dmitry Baryshkov
2026-02-17 21:20 ` [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain Dmitry Baryshkov
0 siblings, 1 reply; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-02-17 21:20 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Ulf Hansson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, stable,
David Heidelberg
Lantronix HDK845 aka Qualcomm SDM845-HDK is a hardware development kit
for the Qualcomm SDM845 / SDA845 platform. It uses the modem-less
version of the chip (SDA845) and provides a rich set of the peripherals
and connectors.
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
David Heidelberg (1):
arm64: dts: qcom: sdm845: Add missing MDSS reset
Dmitry Baryshkov (3):
clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
dt-bindings: arm: qcom: add Qualcomm SDM845 HDK
arm64: dts: qcom: add device tree for SDM845-HDK
Documentation/devicetree/bindings/arm/qcom.yaml | 1 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/sdm845-hdk.dts | 820 ++++++++++++++++++++++++
arch/arm64/boot/dts/qcom/sdm845.dtsi | 1 +
drivers/clk/qcom/dispcc-sdm845.c | 1 +
5 files changed, 824 insertions(+)
---
base-commit: 54f467c01375a137f5801a910089138d2202b148
change-id: 20260122-sdm845-hdk-9466530c4267
Best regards,
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
* [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-17 21:20 [PATCH 0/4] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
@ 2026-02-17 21:20 ` Dmitry Baryshkov
2026-02-18 8:10 ` Taniya Das
` (2 more replies)
0 siblings, 3 replies; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-02-17 21:20 UTC (permalink / raw)
To: Bjorn Andersson, Michael Turquette, Stephen Boyd, Ulf Hansson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, stable
Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds
on until late_initcall_sync") setting of the display clocks is partially
broken. For example, when on SDM845-HDK the bootloader leaves display
enabled, later the kernel can't set up DSI clocks, ending up with the
broken display, blinking blue.
------------[ cut here ]------------
disp_cc_mdss_pclk0_clk_src: rcg didn't update its configuration.
WARNING: CPU: 7 PID: 81 at drivers/clk/qcom/clk-rcg2.c:136 update_config+0xd4/0xf0
Modules linked in:
CPU: 7 UID: 0 PID: 81 Comm: kworker/u32:3 Not tainted 6.16.0-rc2-00040-ga3f36de2f3ba #4236 PREEMPT
Hardware name: Qualcomm Technologies, Inc. SDM845 HDK (DT)
Workqueue: events_unbound deferred_probe_work_func
pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : update_config+0xd4/0xf0
lr : update_config+0xd4/0xf0
sp : ffff800080992a30
x29: ffff800080992a40 x28: 0000000000000001 x27: ffff00008db49080
x26: ffff00008db49220 x25: 0000000000000000 x24: 0000000008d9ee20
x23: ffffd6f1bf1f6cd8 x22: 0000000008d9ee20 x21: ffffd6f1becadfa8
x20: ffffd6f1bf1f6cc0 x19: 0000000000000000 x18: fffffffffffef3f0
x17: 0000000000000004 x16: 0000000000000024 x15: 0000000000000005
x14: fffffffffffcf3ef x13: 2e6e6f6974617275 x12: 6769666e6f632073
x11: 7469206574616470 x10: 752074276e646964 x9 : 72756769666e6f63
x8 : ffff800080992790 x7 : ffff8000809928c0 x6 : ffff800080992850
x5 : ffff8000809927d0 x4 : ffff800080994000 x3 : 0000000000000000
x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000808d1b00
Call trace:
update_config+0xd4/0xf0 (P)
clk_rcg2_configure+0xb8/0xc0
clk_pixel_set_rate+0x138/0x180
clk_change_rate+0x124/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_core_set_rate_nolock+0x230/0x2b0
clk_set_rate+0x38/0x90
_opp_config_clk_single+0x30/0x98
_set_opp+0x11c/0x530
dev_pm_opp_set_rate+0x18c/0x280
dsi_link_clk_set_rate_6g+0x44/0x100
msm_dsi_host_power_on+0xc4/0x988
dsi_mgr_bridge_pre_enable+0x194/0x3e0
drm_atomic_bridge_call_pre_enable+0x40/0x58
drm_atomic_bridge_chain_pre_enable+0x50/0x130
drm_atomic_helper_commit_modeset_enables+0x15c/0x26c
msm_atomic_commit_tail+0x214/0xb18
commit_tail+0xa0/0x1a0
drm_atomic_helper_commit+0x1a8/0x1d0
drm_atomic_commit+0x8c/0xcc
drm_client_modeset_commit_atomic+0x258/0x2d0
drm_client_modeset_commit_locked+0x60/0x1b8
drm_client_modeset_commit+0x2c/0x58
__drm_fb_helper_restore_fbdev_mode_unlocked+0xbc/0xe8
drm_fb_helper_set_par+0x30/0x58
fbcon_init+0x3cc/0x530
visual_init+0x8c/0xe0
do_bind_con_driver.isra.0+0x18c/0x320
do_take_over_console+0x13c/0x1d4
do_fbcon_takeover+0x6c/0xe0
fbcon_fb_registered+0x1dc/0x1e0
do_register_framebuffer+0x1bc/0x278
register_framebuffer+0x30/0x5c
__drm_fb_helper_initial_config_and_unlock+0x2dc/0x5a8
drm_fb_helper_initial_config+0x48/0x58
drm_fbdev_client_hotplug+0x7c/0xe0
drm_client_register+0x5c/0xa0
drm_fbdev_client_setup+0xa4/0x1c0
drm_client_setup+0x58/0xa0
msm_drm_bind+0x3b4/0x460
try_to_bring_up_aggregate_device+0x16c/0x1e0
__component_add+0xa8/0x170
component_add+0x14/0x20
dsi_dev_attach+0x20/0x38
dsi_host_attach+0x58/0x98
devm_mipi_dsi_attach+0x34/0x90
lt9611_attach_dsi+0x98/0x120
lt9611_probe+0x3f8/0x4a0
i2c_device_probe+0x154/0x340
really_probe+0xbc/0x2c0
__driver_probe_device+0x78/0x120
driver_probe_device+0x3c/0x160
__device_attach_driver+0xb8/0x140
bus_for_each_drv+0x88/0xe8
__device_attach+0xa0/0x198
device_initial_probe+0x14/0x20
bus_probe_device+0xb4/0xc0
deferred_probe_work_func+0x90/0xcc
process_one_work+0x214/0x64c
worker_thread+0x1c0/0x364
kthread+0x14c/0x220
ret_from_fork+0x10/0x20
irq event stamp: 110949
hardirqs last enabled at (110949): [<ffffd6f1be502d78>] _raw_spin_unlock_irqrestore+0x6c/0x74
hardirqs last disabled at (110948): [<ffffd6f1be502268>] _raw_spin_lock_irqsave+0x84/0x88
softirqs last enabled at (109450): [<ffffd6f1be1b9ff0>] release_sock+0x90/0xa4
softirqs last disabled at (109448): [<ffffd6f1be1b9f88>] release_sock+0x28/0xa4
---[ end trace 0000000000000000 ]---
------------[ cut here ]------------
disp_cc_mdss_pclk1_clk_src: rcg didn't update its configuration.
WARNING: CPU: 7 PID: 81 at drivers/clk/qcom/clk-rcg2.c:136 update_config+0xd4/0xf0
Modules linked in:
CPU: 7 UID: 0 PID: 81 Comm: kworker/u32:3 Tainted: G W 6.16.0-rc2-00040-ga3f36de2f3ba #4236 PREEMPT
Tainted: [W]=WARN
Hardware name: Qualcomm Technologies, Inc. SDM845 HDK (DT)
Workqueue: events_unbound deferred_probe_work_func
pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
pc : update_config+0xd4/0xf0
lr : update_config+0xd4/0xf0
sp : ffff800080992a30
x29: ffff800080992a40 x28: 0000000000000001 x27: ffff00008db49080
x26: ffff00008db49220 x25: 0000000000000000 x24: 0000000008d9ee20
x23: ffffd6f1bf1f6c48 x22: 0000000008d9ee20 x21: ffffd6f1becb1b50
x20: ffffd6f1bf1f6c30 x19: 0000000000000000 x18: ffffffffffff0790
x17: 0000000000000004 x16: 0000000000000024 x15: 0000000000000005
x14: fffffffffffd078f x13: 2e6e6f6974617275 x12: 6769666e6f632073
x11: 7469206574616470 x10: 752074276e646964 x9 : 72756769666e6f63
x8 : ffff800080992790 x7 : ffff8000809928c0 x6 : ffff800080992850
x5 : ffff8000809927d0 x4 : ffff800080994000 x3 : 0000000000000000
x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000808d1b00
Call trace:
update_config+0xd4/0xf0 (P)
clk_rcg2_configure+0xb8/0xc0
clk_pixel_set_rate+0x138/0x180
clk_change_rate+0x124/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_change_rate+0x1b4/0x620
clk_core_set_rate_nolock+0x230/0x2b0
clk_set_rate+0x38/0x90
_opp_config_clk_single+0x30/0x98
_set_opp+0x11c/0x530
dev_pm_opp_set_rate+0x18c/0x280
dsi_link_clk_set_rate_6g+0x44/0x100
msm_dsi_host_power_on+0xc4/0x988
dsi_mgr_bridge_pre_enable+0x194/0x3e0
drm_atomic_bridge_call_pre_enable+0x40/0x58
drm_atomic_bridge_chain_pre_enable+0x50/0x130
drm_atomic_helper_commit_modeset_enables+0x15c/0x26c
msm_atomic_commit_tail+0x214/0xb18
commit_tail+0xa0/0x1a0
drm_atomic_helper_commit+0x1a8/0x1d0
drm_atomic_commit+0x8c/0xcc
drm_client_modeset_commit_atomic+0x258/0x2d0
drm_client_modeset_commit_locked+0x60/0x1b8
drm_client_modeset_commit+0x2c/0x58
__drm_fb_helper_restore_fbdev_mode_unlocked+0xbc/0xe8
drm_fb_helper_set_par+0x30/0x58
fbcon_init+0x3cc/0x530
visual_init+0x8c/0xe0
do_bind_con_driver.isra.0+0x18c/0x320
do_take_over_console+0x13c/0x1d4
do_fbcon_takeover+0x6c/0xe0
fbcon_fb_registered+0x1dc/0x1e0
do_register_framebuffer+0x1bc/0x278
register_framebuffer+0x30/0x5c
__drm_fb_helper_initial_config_and_unlock+0x2dc/0x5a8
drm_fb_helper_initial_config+0x48/0x58
drm_fbdev_client_hotplug+0x7c/0xe0
drm_client_register+0x5c/0xa0
drm_fbdev_client_setup+0xa4/0x1c0
drm_client_setup+0x58/0xa0
msm_drm_bind+0x3b4/0x460
try_to_bring_up_aggregate_device+0x16c/0x1e0
__component_add+0xa8/0x170
component_add+0x14/0x20
dsi_dev_attach+0x20/0x38
dsi_host_attach+0x58/0x98
devm_mipi_dsi_attach+0x34/0x90
lt9611_attach_dsi+0x98/0x120
lt9611_probe+0x3f8/0x4a0
i2c_device_probe+0x154/0x340
really_probe+0xbc/0x2c0
__driver_probe_device+0x78/0x120
driver_probe_device+0x3c/0x160
__device_attach_driver+0xb8/0x140
bus_for_each_drv+0x88/0xe8
__device_attach+0xa0/0x198
device_initial_probe+0x14/0x20
bus_probe_device+0xb4/0xc0
deferred_probe_work_func+0x90/0xcc
process_one_work+0x214/0x64c
worker_thread+0x1c0/0x364
kthread+0x14c/0x220
ret_from_fork+0x10/0x20
irq event stamp: 110949
hardirqs last enabled at (110949): [<ffffd6f1be502d78>] _raw_spin_unlock_irqrestore+0x6c/0x74
hardirqs last disabled at (110948): [<ffffd6f1be502268>] _raw_spin_lock_irqsave+0x84/0x88
softirqs last enabled at (109450): [<ffffd6f1be1b9ff0>] release_sock+0x90/0xa4
softirqs last disabled at (109448): [<ffffd6f1be1b9f88>] release_sock+0x28/0xa4
---[ end trace 0000000000000000 ]---
lt9611 3-003b: video check: hactive_a=0, hactive_b=0, vactive=0, v_total=0, h_total_sysclk=0
[drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
[drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
fb0: sys_imageblit: framebuffer is not in virtual address space.
[drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
[drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
[drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
[drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
Console: switching to colour frame buffer device 480x135
[drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
[drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
[drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
[drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync")
Cc: stable@vger.kernel.org
Cc: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
---
drivers/clk/qcom/dispcc-sdm845.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
index 78e43f6d7502..468b30497746 100644
--- a/drivers/clk/qcom/dispcc-sdm845.c
+++ b/drivers/clk/qcom/dispcc-sdm845.c
@@ -763,6 +763,7 @@ static struct gdsc mdss_gdsc = {
.en_rest_wait_val = 0x5,
.pd = {
.name = "mdss_gdsc",
+ .flags = GENPD_FLAG_NO_STAY_ON,
},
.pwrsts = PWRSTS_OFF_ON,
.flags = HW_CTRL | POLL_CFG_GDSCR,
--
2.47.3
^ permalink raw reply related [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-17 21:20 ` [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain Dmitry Baryshkov
@ 2026-02-18 8:10 ` Taniya Das
2026-02-18 8:12 ` Krzysztof Kozlowski
2026-02-18 14:49 ` Bjorn Andersson
2 siblings, 0 replies; 8+ messages in thread
From: Taniya Das @ 2026-02-18 8:10 UTC (permalink / raw)
To: Dmitry Baryshkov, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Ulf Hansson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, stable
On 2/18/2026 2:50 AM, Dmitry Baryshkov wrote:
> drivers/clk/qcom/dispcc-sdm845.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
> index 78e43f6d7502..468b30497746 100644
> --- a/drivers/clk/qcom/dispcc-sdm845.c
> +++ b/drivers/clk/qcom/dispcc-sdm845.c
> @@ -763,6 +763,7 @@ static struct gdsc mdss_gdsc = {
> .en_rest_wait_val = 0x5,
> .pd = {
> .name = "mdss_gdsc",
> + .flags = GENPD_FLAG_NO_STAY_ON,
> },
> .pwrsts = PWRSTS_OFF_ON,
> .flags = HW_CTRL | POLL_CFG_GDSCR,
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
--
Thanks,
Taniya Das
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-17 21:20 ` [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain Dmitry Baryshkov
2026-02-18 8:10 ` Taniya Das
@ 2026-02-18 8:12 ` Krzysztof Kozlowski
2026-02-18 14:49 ` Bjorn Andersson
2 siblings, 0 replies; 8+ messages in thread
From: Krzysztof Kozlowski @ 2026-02-18 8:12 UTC (permalink / raw)
To: Dmitry Baryshkov, Bjorn Andersson, Michael Turquette,
Stephen Boyd, Ulf Hansson, Konrad Dybcio, Rob Herring,
Krzysztof Kozlowski, Conor Dooley
Cc: linux-arm-msm, linux-clk, linux-kernel, devicetree, stable
On 17/02/2026 22:20, Dmitry Baryshkov wrote:
> Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds
> on until late_initcall_sync") setting of the display clocks is partially
> broken. For example, when on SDM845-HDK the bootloader leaves display
> enabled, later the kernel can't set up DSI clocks, ending up with the
> broken display, blinking blue.
>
> ------------[ cut here ]------------
> disp_cc_mdss_pclk0_clk_src: rcg didn't update its configuration.
> WARNING: CPU: 7 PID: 81 at drivers/clk/qcom/clk-rcg2.c:136 update_config+0xd4/0xf0
> Modules linked in:
> CPU: 7 UID: 0 PID: 81 Comm: kworker/u32:3 Not tainted 6.16.0-rc2-00040-ga3f36de2f3ba #4236 PREEMPT
> Hardware name: Qualcomm Technologies, Inc. SDM845 HDK (DT)
> Workqueue: events_unbound deferred_probe_work_func
> pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> pc : update_config+0xd4/0xf0
> lr : update_config+0xd4/0xf0
> sp : ffff800080992a30
> x29: ffff800080992a40 x28: 0000000000000001 x27: ffff00008db49080
> x26: ffff00008db49220 x25: 0000000000000000 x24: 0000000008d9ee20
> x23: ffffd6f1bf1f6cd8 x22: 0000000008d9ee20 x21: ffffd6f1becadfa8
> x20: ffffd6f1bf1f6cc0 x19: 0000000000000000 x18: fffffffffffef3f0
> x17: 0000000000000004 x16: 0000000000000024 x15: 0000000000000005
> x14: fffffffffffcf3ef x13: 2e6e6f6974617275 x12: 6769666e6f632073
> x11: 7469206574616470 x10: 752074276e646964 x9 : 72756769666e6f63
> x8 : ffff800080992790 x7 : ffff8000809928c0 x6 : ffff800080992850
> x5 : ffff8000809927d0 x4 : ffff800080994000 x3 : 0000000000000000
> x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000808d1b00
Please trim the context/messages - most of above is not needed
> Call trace:
> update_config+0xd4/0xf0 (P)
> clk_rcg2_configure+0xb8/0xc0
> clk_pixel_set_rate+0x138/0x180
> clk_change_rate+0x124/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_core_set_rate_nolock+0x230/0x2b0
> clk_set_rate+0x38/0x90
> _opp_config_clk_single+0x30/0x98
> _set_opp+0x11c/0x530
> dev_pm_opp_set_rate+0x18c/0x280
> dsi_link_clk_set_rate_6g+0x44/0x100
> msm_dsi_host_power_on+0xc4/0x988
> dsi_mgr_bridge_pre_enable+0x194/0x3e0
> drm_atomic_bridge_call_pre_enable+0x40/0x58
> drm_atomic_bridge_chain_pre_enable+0x50/0x130
> drm_atomic_helper_commit_modeset_enables+0x15c/0x26c
> msm_atomic_commit_tail+0x214/0xb18
> commit_tail+0xa0/0x1a0
> drm_atomic_helper_commit+0x1a8/0x1d0
> drm_atomic_commit+0x8c/0xcc
> drm_client_modeset_commit_atomic+0x258/0x2d0
> drm_client_modeset_commit_locked+0x60/0x1b8
> drm_client_modeset_commit+0x2c/0x58
> __drm_fb_helper_restore_fbdev_mode_unlocked+0xbc/0xe8
> drm_fb_helper_set_par+0x30/0x58
> fbcon_init+0x3cc/0x530
> visual_init+0x8c/0xe0
> do_bind_con_driver.isra.0+0x18c/0x320
> do_take_over_console+0x13c/0x1d4
> do_fbcon_takeover+0x6c/0xe0
> fbcon_fb_registered+0x1dc/0x1e0
> do_register_framebuffer+0x1bc/0x278
> register_framebuffer+0x30/0x5c
> __drm_fb_helper_initial_config_and_unlock+0x2dc/0x5a8
> drm_fb_helper_initial_config+0x48/0x58
> drm_fbdev_client_hotplug+0x7c/0xe0
> drm_client_register+0x5c/0xa0
> drm_fbdev_client_setup+0xa4/0x1c0
> drm_client_setup+0x58/0xa0
> msm_drm_bind+0x3b4/0x460
> try_to_bring_up_aggregate_device+0x16c/0x1e0
> __component_add+0xa8/0x170
> component_add+0x14/0x20
> dsi_dev_attach+0x20/0x38
> dsi_host_attach+0x58/0x98
> devm_mipi_dsi_attach+0x34/0x90
> lt9611_attach_dsi+0x98/0x120
> lt9611_probe+0x3f8/0x4a0
> i2c_device_probe+0x154/0x340
> really_probe+0xbc/0x2c0
Nothing below makes sense either
> __driver_probe_device+0x78/0x120
> driver_probe_device+0x3c/0x160
> __device_attach_driver+0xb8/0x140
> bus_for_each_drv+0x88/0xe8
> __device_attach+0xa0/0x198
> device_initial_probe+0x14/0x20
> bus_probe_device+0xb4/0xc0
> deferred_probe_work_func+0x90/0xcc
> process_one_work+0x214/0x64c
> worker_thread+0x1c0/0x364
> kthread+0x14c/0x220
> ret_from_fork+0x10/0x20
> irq event stamp: 110949
> hardirqs last enabled at (110949): [<ffffd6f1be502d78>] _raw_spin_unlock_irqrestore+0x6c/0x74
> hardirqs last disabled at (110948): [<ffffd6f1be502268>] _raw_spin_lock_irqsave+0x84/0x88
> softirqs last enabled at (109450): [<ffffd6f1be1b9ff0>] release_sock+0x90/0xa4
> softirqs last disabled at (109448): [<ffffd6f1be1b9f88>] release_sock+0x28/0xa4
> ---[ end trace 0000000000000000 ]---
> ------------[ cut here ]------------
> disp_cc_mdss_pclk1_clk_src: rcg didn't update its configuration.
And that's the same log.
Best regards,
Krzysztof
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-17 21:20 ` [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain Dmitry Baryshkov
2026-02-18 8:10 ` Taniya Das
2026-02-18 8:12 ` Krzysztof Kozlowski
@ 2026-02-18 14:49 ` Bjorn Andersson
2026-02-18 15:58 ` Dmitry Baryshkov
2 siblings, 1 reply; 8+ messages in thread
From: Bjorn Andersson @ 2026-02-18 14:49 UTC (permalink / raw)
To: Dmitry Baryshkov
Cc: Michael Turquette, Stephen Boyd, Ulf Hansson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-msm,
linux-clk, linux-kernel, devicetree, stable
On Tue, Feb 17, 2026 at 11:20:42PM +0200, Dmitry Baryshkov wrote:
> Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds
> on until late_initcall_sync") setting of the display clocks is partially
> broken. For example, when on SDM845-HDK the bootloader leaves display
> enabled, later the kernel can't set up DSI clocks, ending up with the
> broken display, blinking blue.
This describes how the problem manifest itself. Can you please document
why clocks are partially broken and how that relate to the GDSC state,
and why setting GENPD_FLAG_NO_STAY_ON solves this?
Regards,
Bjorn
>
> ------------[ cut here ]------------
> disp_cc_mdss_pclk0_clk_src: rcg didn't update its configuration.
> WARNING: CPU: 7 PID: 81 at drivers/clk/qcom/clk-rcg2.c:136 update_config+0xd4/0xf0
> Modules linked in:
> CPU: 7 UID: 0 PID: 81 Comm: kworker/u32:3 Not tainted 6.16.0-rc2-00040-ga3f36de2f3ba #4236 PREEMPT
> Hardware name: Qualcomm Technologies, Inc. SDM845 HDK (DT)
> Workqueue: events_unbound deferred_probe_work_func
> pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> pc : update_config+0xd4/0xf0
> lr : update_config+0xd4/0xf0
> sp : ffff800080992a30
> x29: ffff800080992a40 x28: 0000000000000001 x27: ffff00008db49080
> x26: ffff00008db49220 x25: 0000000000000000 x24: 0000000008d9ee20
> x23: ffffd6f1bf1f6cd8 x22: 0000000008d9ee20 x21: ffffd6f1becadfa8
> x20: ffffd6f1bf1f6cc0 x19: 0000000000000000 x18: fffffffffffef3f0
> x17: 0000000000000004 x16: 0000000000000024 x15: 0000000000000005
> x14: fffffffffffcf3ef x13: 2e6e6f6974617275 x12: 6769666e6f632073
> x11: 7469206574616470 x10: 752074276e646964 x9 : 72756769666e6f63
> x8 : ffff800080992790 x7 : ffff8000809928c0 x6 : ffff800080992850
> x5 : ffff8000809927d0 x4 : ffff800080994000 x3 : 0000000000000000
> x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000808d1b00
> Call trace:
> update_config+0xd4/0xf0 (P)
> clk_rcg2_configure+0xb8/0xc0
> clk_pixel_set_rate+0x138/0x180
> clk_change_rate+0x124/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_core_set_rate_nolock+0x230/0x2b0
> clk_set_rate+0x38/0x90
> _opp_config_clk_single+0x30/0x98
> _set_opp+0x11c/0x530
> dev_pm_opp_set_rate+0x18c/0x280
> dsi_link_clk_set_rate_6g+0x44/0x100
> msm_dsi_host_power_on+0xc4/0x988
> dsi_mgr_bridge_pre_enable+0x194/0x3e0
> drm_atomic_bridge_call_pre_enable+0x40/0x58
> drm_atomic_bridge_chain_pre_enable+0x50/0x130
> drm_atomic_helper_commit_modeset_enables+0x15c/0x26c
> msm_atomic_commit_tail+0x214/0xb18
> commit_tail+0xa0/0x1a0
> drm_atomic_helper_commit+0x1a8/0x1d0
> drm_atomic_commit+0x8c/0xcc
> drm_client_modeset_commit_atomic+0x258/0x2d0
> drm_client_modeset_commit_locked+0x60/0x1b8
> drm_client_modeset_commit+0x2c/0x58
> __drm_fb_helper_restore_fbdev_mode_unlocked+0xbc/0xe8
> drm_fb_helper_set_par+0x30/0x58
> fbcon_init+0x3cc/0x530
> visual_init+0x8c/0xe0
> do_bind_con_driver.isra.0+0x18c/0x320
> do_take_over_console+0x13c/0x1d4
> do_fbcon_takeover+0x6c/0xe0
> fbcon_fb_registered+0x1dc/0x1e0
> do_register_framebuffer+0x1bc/0x278
> register_framebuffer+0x30/0x5c
> __drm_fb_helper_initial_config_and_unlock+0x2dc/0x5a8
> drm_fb_helper_initial_config+0x48/0x58
> drm_fbdev_client_hotplug+0x7c/0xe0
> drm_client_register+0x5c/0xa0
> drm_fbdev_client_setup+0xa4/0x1c0
> drm_client_setup+0x58/0xa0
> msm_drm_bind+0x3b4/0x460
> try_to_bring_up_aggregate_device+0x16c/0x1e0
> __component_add+0xa8/0x170
> component_add+0x14/0x20
> dsi_dev_attach+0x20/0x38
> dsi_host_attach+0x58/0x98
> devm_mipi_dsi_attach+0x34/0x90
> lt9611_attach_dsi+0x98/0x120
> lt9611_probe+0x3f8/0x4a0
> i2c_device_probe+0x154/0x340
> really_probe+0xbc/0x2c0
> __driver_probe_device+0x78/0x120
> driver_probe_device+0x3c/0x160
> __device_attach_driver+0xb8/0x140
> bus_for_each_drv+0x88/0xe8
> __device_attach+0xa0/0x198
> device_initial_probe+0x14/0x20
> bus_probe_device+0xb4/0xc0
> deferred_probe_work_func+0x90/0xcc
> process_one_work+0x214/0x64c
> worker_thread+0x1c0/0x364
> kthread+0x14c/0x220
> ret_from_fork+0x10/0x20
> irq event stamp: 110949
> hardirqs last enabled at (110949): [<ffffd6f1be502d78>] _raw_spin_unlock_irqrestore+0x6c/0x74
> hardirqs last disabled at (110948): [<ffffd6f1be502268>] _raw_spin_lock_irqsave+0x84/0x88
> softirqs last enabled at (109450): [<ffffd6f1be1b9ff0>] release_sock+0x90/0xa4
> softirqs last disabled at (109448): [<ffffd6f1be1b9f88>] release_sock+0x28/0xa4
> ---[ end trace 0000000000000000 ]---
> ------------[ cut here ]------------
> disp_cc_mdss_pclk1_clk_src: rcg didn't update its configuration.
> WARNING: CPU: 7 PID: 81 at drivers/clk/qcom/clk-rcg2.c:136 update_config+0xd4/0xf0
> Modules linked in:
> CPU: 7 UID: 0 PID: 81 Comm: kworker/u32:3 Tainted: G W 6.16.0-rc2-00040-ga3f36de2f3ba #4236 PREEMPT
> Tainted: [W]=WARN
> Hardware name: Qualcomm Technologies, Inc. SDM845 HDK (DT)
> Workqueue: events_unbound deferred_probe_work_func
> pstate: 60400005 (nZCv daif +PAN -UAO -TCO -DIT -SSBS BTYPE=--)
> pc : update_config+0xd4/0xf0
> lr : update_config+0xd4/0xf0
> sp : ffff800080992a30
> x29: ffff800080992a40 x28: 0000000000000001 x27: ffff00008db49080
> x26: ffff00008db49220 x25: 0000000000000000 x24: 0000000008d9ee20
> x23: ffffd6f1bf1f6c48 x22: 0000000008d9ee20 x21: ffffd6f1becb1b50
> x20: ffffd6f1bf1f6c30 x19: 0000000000000000 x18: ffffffffffff0790
> x17: 0000000000000004 x16: 0000000000000024 x15: 0000000000000005
> x14: fffffffffffd078f x13: 2e6e6f6974617275 x12: 6769666e6f632073
> x11: 7469206574616470 x10: 752074276e646964 x9 : 72756769666e6f63
> x8 : ffff800080992790 x7 : ffff8000809928c0 x6 : ffff800080992850
> x5 : ffff8000809927d0 x4 : ffff800080994000 x3 : 0000000000000000
> x2 : 0000000000000000 x1 : 0000000000000000 x0 : ffff0000808d1b00
> Call trace:
> update_config+0xd4/0xf0 (P)
> clk_rcg2_configure+0xb8/0xc0
> clk_pixel_set_rate+0x138/0x180
> clk_change_rate+0x124/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_change_rate+0x1b4/0x620
> clk_core_set_rate_nolock+0x230/0x2b0
> clk_set_rate+0x38/0x90
> _opp_config_clk_single+0x30/0x98
> _set_opp+0x11c/0x530
> dev_pm_opp_set_rate+0x18c/0x280
> dsi_link_clk_set_rate_6g+0x44/0x100
> msm_dsi_host_power_on+0xc4/0x988
> dsi_mgr_bridge_pre_enable+0x194/0x3e0
> drm_atomic_bridge_call_pre_enable+0x40/0x58
> drm_atomic_bridge_chain_pre_enable+0x50/0x130
> drm_atomic_helper_commit_modeset_enables+0x15c/0x26c
> msm_atomic_commit_tail+0x214/0xb18
> commit_tail+0xa0/0x1a0
> drm_atomic_helper_commit+0x1a8/0x1d0
> drm_atomic_commit+0x8c/0xcc
> drm_client_modeset_commit_atomic+0x258/0x2d0
> drm_client_modeset_commit_locked+0x60/0x1b8
> drm_client_modeset_commit+0x2c/0x58
> __drm_fb_helper_restore_fbdev_mode_unlocked+0xbc/0xe8
> drm_fb_helper_set_par+0x30/0x58
> fbcon_init+0x3cc/0x530
> visual_init+0x8c/0xe0
> do_bind_con_driver.isra.0+0x18c/0x320
> do_take_over_console+0x13c/0x1d4
> do_fbcon_takeover+0x6c/0xe0
> fbcon_fb_registered+0x1dc/0x1e0
> do_register_framebuffer+0x1bc/0x278
> register_framebuffer+0x30/0x5c
> __drm_fb_helper_initial_config_and_unlock+0x2dc/0x5a8
> drm_fb_helper_initial_config+0x48/0x58
> drm_fbdev_client_hotplug+0x7c/0xe0
> drm_client_register+0x5c/0xa0
> drm_fbdev_client_setup+0xa4/0x1c0
> drm_client_setup+0x58/0xa0
> msm_drm_bind+0x3b4/0x460
> try_to_bring_up_aggregate_device+0x16c/0x1e0
> __component_add+0xa8/0x170
> component_add+0x14/0x20
> dsi_dev_attach+0x20/0x38
> dsi_host_attach+0x58/0x98
> devm_mipi_dsi_attach+0x34/0x90
> lt9611_attach_dsi+0x98/0x120
> lt9611_probe+0x3f8/0x4a0
> i2c_device_probe+0x154/0x340
> really_probe+0xbc/0x2c0
> __driver_probe_device+0x78/0x120
> driver_probe_device+0x3c/0x160
> __device_attach_driver+0xb8/0x140
> bus_for_each_drv+0x88/0xe8
> __device_attach+0xa0/0x198
> device_initial_probe+0x14/0x20
> bus_probe_device+0xb4/0xc0
> deferred_probe_work_func+0x90/0xcc
> process_one_work+0x214/0x64c
> worker_thread+0x1c0/0x364
> kthread+0x14c/0x220
> ret_from_fork+0x10/0x20
> irq event stamp: 110949
> hardirqs last enabled at (110949): [<ffffd6f1be502d78>] _raw_spin_unlock_irqrestore+0x6c/0x74
> hardirqs last disabled at (110948): [<ffffd6f1be502268>] _raw_spin_lock_irqsave+0x84/0x88
> softirqs last enabled at (109450): [<ffffd6f1be1b9ff0>] release_sock+0x90/0xa4
> softirqs last disabled at (109448): [<ffffd6f1be1b9f88>] release_sock+0x28/0xa4
> ---[ end trace 0000000000000000 ]---
> lt9611 3-003b: video check: hactive_a=0, hactive_b=0, vactive=0, v_total=0, h_total_sysclk=0
> [drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
> [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
> fb0: sys_imageblit: framebuffer is not in virtual address space.
> [drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
> [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
> [drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
> [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
> Console: switching to colour frame buffer device 480x135
> [drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
> [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
> [drm:dpu_encoder_phys_vid_wait_for_commit_done:540] [dpu error]vblank timeout: 2
> [drm:dpu_kms_wait_for_commit_done:524] [dpu error]wait for commit done returned -110
>
> Fixes: 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds on until late_initcall_sync")
> Cc: stable@vger.kernel.org
> Cc: Ulf Hansson <ulf.hansson@linaro.org>
> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
> ---
> drivers/clk/qcom/dispcc-sdm845.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/drivers/clk/qcom/dispcc-sdm845.c b/drivers/clk/qcom/dispcc-sdm845.c
> index 78e43f6d7502..468b30497746 100644
> --- a/drivers/clk/qcom/dispcc-sdm845.c
> +++ b/drivers/clk/qcom/dispcc-sdm845.c
> @@ -763,6 +763,7 @@ static struct gdsc mdss_gdsc = {
> .en_rest_wait_val = 0x5,
> .pd = {
> .name = "mdss_gdsc",
> + .flags = GENPD_FLAG_NO_STAY_ON,
> },
> .pwrsts = PWRSTS_OFF_ON,
> .flags = HW_CTRL | POLL_CFG_GDSCR,
>
> --
> 2.47.3
>
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-18 14:49 ` Bjorn Andersson
@ 2026-02-18 15:58 ` Dmitry Baryshkov
2026-02-19 18:11 ` Jagadeesh Kona
0 siblings, 1 reply; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-02-18 15:58 UTC (permalink / raw)
To: Bjorn Andersson
Cc: Michael Turquette, Stephen Boyd, Ulf Hansson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-msm,
linux-clk, linux-kernel, devicetree, stable
On Wed, Feb 18, 2026 at 08:49:34AM -0600, Bjorn Andersson wrote:
> On Tue, Feb 17, 2026 at 11:20:42PM +0200, Dmitry Baryshkov wrote:
> > Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds
> > on until late_initcall_sync") setting of the display clocks is partially
> > broken. For example, when on SDM845-HDK the bootloader leaves display
> > enabled, later the kernel can't set up DSI clocks, ending up with the
> > broken display, blinking blue.
>
> This describes how the problem manifest itself. Can you please document
> why clocks are partially broken and how that relate to the GDSC state,
> and why setting GENPD_FLAG_NO_STAY_ON solves this?
Probably the best answer (for the second part of the question): I don't
know (yet).
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-18 15:58 ` Dmitry Baryshkov
@ 2026-02-19 18:11 ` Jagadeesh Kona
2026-02-23 1:27 ` Dmitry Baryshkov
0 siblings, 1 reply; 8+ messages in thread
From: Jagadeesh Kona @ 2026-02-19 18:11 UTC (permalink / raw)
To: Dmitry Baryshkov, Bjorn Andersson
Cc: Michael Turquette, Stephen Boyd, Ulf Hansson, Konrad Dybcio,
Rob Herring, Krzysztof Kozlowski, Conor Dooley, linux-arm-msm,
linux-clk, linux-kernel, devicetree, stable
On 2/18/2026 9:28 PM, Dmitry Baryshkov wrote:
> On Wed, Feb 18, 2026 at 08:49:34AM -0600, Bjorn Andersson wrote:
>> On Tue, Feb 17, 2026 at 11:20:42PM +0200, Dmitry Baryshkov wrote:
>>> Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds
>>> on until late_initcall_sync") setting of the display clocks is partially
>>> broken. For example, when on SDM845-HDK the bootloader leaves display
>>> enabled, later the kernel can't set up DSI clocks, ending up with the
>>> broken display, blinking blue.
>>
>> This describes how the problem manifest itself. Can you please document
>> why clocks are partially broken and how that relate to the GDSC state,
>> and why setting GENPD_FLAG_NO_STAY_ON solves this?
>
> Probably the best answer (for the second part of the question): I don't
> know (yet).
>
RCG update typically gets stuck if the new/old source is OFF while the RCG is ON; but
if the RCG is already OFF, the update proceeds safely even if new/old source is OFF.
A possible theory is that if the GDSC is in OFF state, the branch clocks will be OFF,
due to this RCG also will be in OFF state, preventing the update stuck issue even if
the new/old source is OFF. But, if the GDSC remains on until sync_state, the branches
and RCG likely stays ON, leading to update stuck issue if the new/old source is OFF.
Ideally, if both old and new RCG sources are ON during the update configuration, the
update should succeed regardless of the GDSC status.
Thanks,
Jagadeesh
^ permalink raw reply [flat|nested] 8+ messages in thread
* Re: [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain
2026-02-19 18:11 ` Jagadeesh Kona
@ 2026-02-23 1:27 ` Dmitry Baryshkov
0 siblings, 0 replies; 8+ messages in thread
From: Dmitry Baryshkov @ 2026-02-23 1:27 UTC (permalink / raw)
To: Jagadeesh Kona
Cc: Bjorn Andersson, Michael Turquette, Stephen Boyd, Ulf Hansson,
Konrad Dybcio, Rob Herring, Krzysztof Kozlowski, Conor Dooley,
linux-arm-msm, linux-clk, linux-kernel, devicetree, stable
On Thu, Feb 19, 2026 at 11:41:06PM +0530, Jagadeesh Kona wrote:
>
>
> On 2/18/2026 9:28 PM, Dmitry Baryshkov wrote:
> > On Wed, Feb 18, 2026 at 08:49:34AM -0600, Bjorn Andersson wrote:
> >> On Tue, Feb 17, 2026 at 11:20:42PM +0200, Dmitry Baryshkov wrote:
> >>> Since the commit 13a4b7fb6260 ("pmdomain: core: Leave powered-on genpds
> >>> on until late_initcall_sync") setting of the display clocks is partially
> >>> broken. For example, when on SDM845-HDK the bootloader leaves display
> >>> enabled, later the kernel can't set up DSI clocks, ending up with the
> >>> broken display, blinking blue.
> >>
> >> This describes how the problem manifest itself. Can you please document
> >> why clocks are partially broken and how that relate to the GDSC state,
> >> and why setting GENPD_FLAG_NO_STAY_ON solves this?
> >
> > Probably the best answer (for the second part of the question): I don't
> > know (yet).
> >
>
> RCG update typically gets stuck if the new/old source is OFF while the RCG is ON; but
> if the RCG is already OFF, the update proceeds safely even if new/old source is OFF.
>
> A possible theory is that if the GDSC is in OFF state, the branch clocks will be OFF,
> due to this RCG also will be in OFF state, preventing the update stuck issue even if
> the new/old source is OFF. But, if the GDSC remains on until sync_state, the branches
> and RCG likely stays ON, leading to update stuck issue if the new/old source is OFF.
>
> Ideally, if both old and new RCG sources are ON during the update configuration, the
> update should succeed regardless of the GDSC status.
Both pclkN_clk_src clocks have CLK_OPS_PARENT_ENABLE set, so the parents
must be on.
--
With best wishes
Dmitry
^ permalink raw reply [flat|nested] 8+ messages in thread
end of thread, other threads:[~2026-02-23 1:27 UTC | newest]
Thread overview: 8+ messages (download: mbox.gz follow: Atom feed
-- links below jump to the message on this page --
2026-02-17 21:20 [PATCH 0/4] arm64: dts: qcom: support SDM845 HDK Dmitry Baryshkov
2026-02-17 21:20 ` [PATCH 1/4] clk: qcom: dispcc-sdm845: set GENPD_FLAG_NO_STAY_ON flag for MDSS domain Dmitry Baryshkov
2026-02-18 8:10 ` Taniya Das
2026-02-18 8:12 ` Krzysztof Kozlowski
2026-02-18 14:49 ` Bjorn Andersson
2026-02-18 15:58 ` Dmitry Baryshkov
2026-02-19 18:11 ` Jagadeesh Kona
2026-02-23 1:27 ` Dmitry Baryshkov
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