* [PATCH 01/10] tpm_tis: Introduce intermediate layer for TPM access
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
@ 2016-04-10 21:22 ` Christophe Ricard
[not found] ` <1460323386-16892-2-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:22 ` [PATCH 02/10] tpm_tis: Extend low-level interface to support proper return codes Christophe Ricard
` (8 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:22 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
This splits tpm_tis in a high-level protocol part and a low-level interface
for the actual TPM communication. The low-level interface can then be
implemented by additional drivers to provide access to TPMs using other
mechanisms, for example native I2C or SPI transfers, while still reusing
the same TIS protocol implementation.
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm.h | 41 ++++++++++
drivers/char/tpm/tpm_tis.c | 188 ++++++++++++++++++++++++++-------------------
include/linux/tpm.h | 11 +++
3 files changed, 160 insertions(+), 80 deletions(-)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index 8bc6fb8..a8f48a2 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -149,6 +149,7 @@ struct tpm_chip {
* when the driver is unregistered, see tpm_try_get_ops.
*/
struct rw_semaphore ops_sem;
+ const struct tpm_class_lowlevel *lowlevel;
const struct tpm_class_ops *ops;
unsigned int flags;
@@ -466,6 +467,46 @@ static inline void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value)
tpm_buf_append(buf, (u8 *) &value2, 4);
}
+static inline void tpm_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *result)
+{
+ chip->lowlevel->read_bytes(chip, addr, len, result);
+}
+
+static inline u8 tpm_read8(struct tpm_chip *chip, u32 addr)
+{
+ u8 result;
+
+ chip->lowlevel->read_bytes(chip, addr, 1, &result);
+ return result;
+}
+
+static inline u16 tpm_read16(struct tpm_chip *chip, u32 addr)
+{
+ return chip->lowlevel->read16(chip, addr);
+}
+
+static inline u32 tpm_read32(struct tpm_chip *chip, u32 addr)
+{
+ return chip->lowlevel->read32(chip, addr);
+}
+
+static inline void tpm_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *value)
+{
+ chip->lowlevel->write_bytes(chip, addr, len, value);
+}
+
+static inline void tpm_write8(struct tpm_chip *chip, u32 addr, u8 value)
+{
+ chip->lowlevel->write_bytes(chip, addr, 1, &value);
+}
+
+static inline void tpm_write32(struct tpm_chip *chip, u32 addr, u32 value)
+{
+ chip->lowlevel->write32(chip, addr, value);
+}
+
extern struct class *tpm_class;
extern dev_t tpm_devt;
extern const struct file_operations tpm_fops;
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 1e45e73..eb0b6802 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -132,10 +132,9 @@ static inline int is_itpm(struct acpi_device *dev)
* correct values in the other bits.' */
static int wait_startup(struct tpm_chip *chip, int l)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
unsigned long stop = jiffies + chip->timeout_a;
do {
- if (ioread8(priv->iobase + TPM_ACCESS(l)) &
+ if (tpm_read8(chip, TPM_ACCESS(l)) &
TPM_ACCESS_VALID)
return 0;
msleep(TPM_TIMEOUT);
@@ -147,7 +146,7 @@ static int check_locality(struct tpm_chip *chip, int l)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
- if ((ioread8(priv->iobase + TPM_ACCESS(l)) &
+ if ((tpm_read8(chip, TPM_ACCESS(l)) &
(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
return priv->locality = l;
@@ -157,13 +156,11 @@ static int check_locality(struct tpm_chip *chip, int l)
static void release_locality(struct tpm_chip *chip, int l, int force)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
-
- if (force || (ioread8(priv->iobase + TPM_ACCESS(l)) &
+ if (force || (tpm_read8(chip, TPM_ACCESS(l)) &
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
- iowrite8(TPM_ACCESS_ACTIVE_LOCALITY,
- priv->iobase + TPM_ACCESS(l));
+ tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
+
}
static int request_locality(struct tpm_chip *chip, int l)
@@ -175,8 +172,8 @@ static int request_locality(struct tpm_chip *chip, int l)
if (check_locality(chip, l) >= 0)
return l;
- iowrite8(TPM_ACCESS_REQUEST_USE,
- priv->iobase + TPM_ACCESS(l));
+ tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
+
stop = jiffies + chip->timeout_a;
@@ -211,8 +208,7 @@ static u8 tpm_tis_status(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
- return ioread8(priv->iobase +
- TPM_STS(priv->locality));
+ return tpm_read8(chip, TPM_STS(priv->locality));
}
static void tpm_tis_ready(struct tpm_chip *chip)
@@ -220,8 +216,7 @@ static void tpm_tis_ready(struct tpm_chip *chip)
struct priv_data *priv = dev_get_drvdata(&chip->dev);
/* this causes the current command to be aborted */
- iowrite8(TPM_STS_COMMAND_READY,
- priv->iobase + TPM_STS(priv->locality));
+ tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
}
static int get_burstcount(struct tpm_chip *chip)
@@ -234,11 +229,8 @@ static int get_burstcount(struct tpm_chip *chip)
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
- burstcnt = ioread8(priv->iobase +
- TPM_STS(priv->locality) + 1);
- burstcnt += ioread8(priv->iobase +
- TPM_STS(priv->locality) +
- 2) << 8;
+ burstcnt = tpm_read8(chip, TPM_STS(priv->locality) + 1);
+ burstcnt += tpm_read8(chip, TPM_STS(priv->locality) + 2) << 8;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
@@ -254,12 +246,11 @@ static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
wait_for_tpm_stat(chip,
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
chip->timeout_c,
- &priv->read_queue, true)
- == 0) {
- burstcnt = get_burstcount(chip);
- for (; burstcnt > 0 && size < count; burstcnt--)
- buf[size++] = ioread8(priv->iobase +
- TPM_DATA_FIFO(priv->locality));
+ &priv->read_queue, true) == 0) {
+ burstcnt = min_t(int, get_burstcount(chip), count - size);
+ tpm_read_bytes(chip, TPM_DATA_FIFO(priv->locality), burstcnt,
+ buf + size);
+ size += burstcnt;
}
return size;
}
@@ -341,12 +332,10 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
}
while (count < len - 1) {
- burstcnt = get_burstcount(chip);
- for (; burstcnt > 0 && count < len - 1; burstcnt--) {
- iowrite8(buf[count], priv->iobase +
- TPM_DATA_FIFO(priv->locality));
- count++;
- }
+ burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
+ tpm_write_bytes(chip, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + count);
+ count += burstcnt;
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
@@ -358,8 +347,7 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
}
/* write last byte */
- iowrite8(buf[count],
- priv->iobase + TPM_DATA_FIFO(priv->locality));
+ tpm_write8(chip, TPM_DATA_FIFO(priv->locality), buf[count]);
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
status = tpm_tis_status(chip);
@@ -381,12 +369,10 @@ static void disable_interrupts(struct tpm_chip *chip)
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u32 intmask;
- intmask =
- ioread32(priv->iobase +
- TPM_INT_ENABLE(priv->locality));
+ intmask = tpm_read32(chip, TPM_INT_ENABLE(priv->locality));
intmask &= ~TPM_GLOBAL_INT_ENABLE;
- iowrite32(intmask,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
+
devm_free_irq(&chip->dev, priv->irq, chip);
priv->irq = 0;
chip->flags &= ~TPM_CHIP_FLAG_IRQ;
@@ -409,9 +395,7 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
return rc;
/* go and do it */
- iowrite8(TPM_STS_GO,
- priv->iobase + TPM_STS(priv->locality));
-
+ tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_GO);
if (chip->flags & TPM_CHIP_FLAG_IRQ) {
ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
@@ -471,11 +455,10 @@ static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
unsigned long *timeout_cap)
{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
int i;
u32 did_vid;
- did_vid = ioread32(priv->iobase + TPM_DID_VID(0));
+ did_vid = tpm_read32(chip, TPM_DID_VID(0));
for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
if (vendor_timeout_overrides[i].did_vid != did_vid)
@@ -503,7 +486,7 @@ static int probe_itpm(struct tpm_chip *chip)
};
size_t len = sizeof(cmd_getticks);
bool rem_itpm = itpm;
- u16 vendor = ioread16(priv->iobase + TPM_DID_VID(0));
+ u16 vendor = tpm_read16(chip, TPM_DID_VID(0));
/* probe only iTPMS */
if (vendor != TPM_VID_INTEL)
@@ -561,6 +544,61 @@ static const struct tpm_class_ops tpm_tis = {
.req_canceled = tpm_tis_req_canceled,
};
+static void tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *result)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ while (len--)
+ *result++ = ioread8(priv->iobase + addr);
+}
+
+static void tpm_mem_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *value)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ while (len--)
+ iowrite8(*value++, priv->iobase + addr);
+}
+
+static u16 tpm_mem_read16(struct tpm_chip *chip, u32 addr)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ return ioread16(priv->iobase + addr);
+}
+
+static void tpm_mem_write16(struct tpm_chip *chip, u32 addr, u16 value)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ iowrite16(value, priv->iobase + addr);
+}
+
+static u32 tpm_mem_read32(struct tpm_chip *chip, u32 addr)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ return ioread32(priv->iobase + addr);
+}
+
+static void tpm_mem_write32(struct tpm_chip *chip, u32 addr, u32 value)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ iowrite32(value, priv->iobase + addr);
+}
+
+static const struct tpm_class_lowlevel tpm_mem = {
+ .read_bytes = tpm_mem_read_bytes,
+ .write_bytes = tpm_mem_write_bytes,
+ .read16 = tpm_mem_read16,
+ .write16 = tpm_mem_write16,
+ .read32 = tpm_mem_read32,
+ .write32 = tpm_mem_write32,
+};
+
static irqreturn_t tis_int_handler(int dummy, void *dev_id)
{
struct tpm_chip *chip = dev_id;
@@ -568,8 +606,7 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
u32 interrupt;
int i;
- interrupt = ioread32(priv->iobase +
- TPM_INT_STATUS(priv->locality));
+ interrupt = tpm_read32(chip, TPM_INT_STATUS(priv->locality));
if (interrupt == 0)
return IRQ_NONE;
@@ -587,10 +624,9 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
wake_up_interruptible(&priv->int_queue);
/* Clear interrupts handled with TPM_EOI */
- iowrite32(interrupt,
- priv->iobase +
- TPM_INT_STATUS(priv->locality));
- ioread32(priv->iobase + TPM_INT_STATUS(priv->locality));
+ tpm_write32(chip, TPM_INT_STATUS(priv->locality), interrupt);
+
+ tpm_read32(chip, TPM_INT_STATUS(priv->locality));
return IRQ_HANDLED;
}
@@ -612,19 +648,16 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
}
priv->irq = irq;
- original_int_vec = ioread8(priv->iobase +
- TPM_INT_VECTOR(priv->locality));
- iowrite8(irq,
- priv->iobase + TPM_INT_VECTOR(priv->locality));
+ original_int_vec = tpm_read8(chip, TPM_INT_VECTOR(priv->locality));
+ tpm_write8(chip, TPM_INT_VECTOR(priv->locality), irq);
/* Clear all existing */
- iowrite32(ioread32(priv->iobase +
- TPM_INT_STATUS(priv->locality)),
- priv->iobase + TPM_INT_STATUS(priv->locality));
+ tpm_write32(chip, TPM_INT_STATUS(priv->locality),
+ tpm_read32(chip, TPM_INT_STATUS(priv->locality)));
/* Turn on */
- iowrite32(intmask | TPM_GLOBAL_INT_ENABLE,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ tpm_write32(chip, TPM_INT_ENABLE(priv->locality),
+ intmask | TPM_GLOBAL_INT_ENABLE);
priv->irq_tested = false;
@@ -640,8 +673,9 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
* will call disable_irq which undoes all of the above.
*/
if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
- iowrite8(original_int_vec,
- priv->iobase + TPM_INT_VECTOR(priv->locality));
+ tpm_write8(chip, TPM_INT_VECTOR(priv->locality),
+ original_int_vec);
+
return 1;
}
@@ -658,8 +692,7 @@ static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
u8 original_int_vec;
int i;
- original_int_vec = ioread8(priv->iobase +
- TPM_INT_VECTOR(priv->locality));
+ original_int_vec = tpm_read8(chip, TPM_INT_VECTOR(priv->locality));
if (!original_int_vec) {
if (IS_ENABLED(CONFIG_X86))
@@ -679,12 +712,12 @@ MODULE_PARM_DESC(interrupts, "Enable interrupts");
static void tpm_tis_remove(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
- void __iomem *reg = priv->iobase + TPM_INT_ENABLE(priv->locality);
+ u32 reg = TPM_INT_ENABLE(priv->locality);
if (chip->flags & TPM_CHIP_FLAG_TPM2)
tpm2_shutdown(chip, TPM2_SU_CLEAR);
- iowrite32(~TPM_GLOBAL_INT_ENABLE & ioread32(reg), reg);
+ tpm_write32(chip, reg, ~TPM_GLOBAL_INT_ENABLE & tpm_read32(chip, reg));
release_locality(chip, priv->locality, 1);
}
@@ -712,6 +745,8 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (IS_ERR(priv->iobase))
return PTR_ERR(priv->iobase);
+ chip->lowlevel = &tpm_mem;
+
/* Maximum timeouts */
chip->timeout_a = TIS_TIMEOUT_A_MAX;
chip->timeout_b = TIS_TIMEOUT_B_MAX;
@@ -726,13 +761,11 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
}
/* Take control of the TPM's interrupt hardware and shut it off */
- intmask = ioread32(priv->iobase +
- TPM_INT_ENABLE(priv->locality));
+ intmask = tpm_read32(chip, TPM_INT_ENABLE(priv->locality));
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
intmask &= ~TPM_GLOBAL_INT_ENABLE;
- iowrite32(intmask,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
if (request_locality(chip, 0) != 0) {
rc = -ENODEV;
@@ -743,12 +776,12 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (rc)
goto out_err;
- vendor = ioread32(priv->iobase + TPM_DID_VID(0));
+ vendor = tpm_read32(chip, TPM_DID_VID(0));
priv->manufacturer_id = vendor;
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
- vendor >> 16, ioread8(priv->iobase + TPM_RID(0)));
+ vendor >> 16, tpm_read8(chip, TPM_RID(0)));
if (!itpm) {
probe = probe_itpm(chip);
@@ -764,9 +797,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
/* Figure out the capabilities */
- intfcaps =
- ioread32(priv->iobase +
- TPM_INTF_CAPS(priv->locality));
+ intfcaps = tpm_read32(chip, TPM_INTF_CAPS(priv->locality));
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
intfcaps);
if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
@@ -849,18 +880,15 @@ static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
/* reenable interrupts that device may have lost or
BIOS/firmware may have disabled */
- iowrite8(priv->irq, priv->iobase +
- TPM_INT_VECTOR(priv->locality));
+ tpm_write8(chip, TPM_INT_VECTOR(priv->locality), priv->irq);
- intmask =
- ioread32(priv->iobase + TPM_INT_ENABLE(priv->locality));
+ intmask = tpm_read32(chip, TPM_INT_ENABLE(priv->locality));
intmask |= TPM_INTF_CMD_READY_INT
| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
| TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
- iowrite32(intmask,
- priv->iobase + TPM_INT_ENABLE(priv->locality));
+ tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
}
static int tpm_tis_resume(struct device *dev)
diff --git a/include/linux/tpm.h b/include/linux/tpm.h
index 706e63e..19d5d426 100644
--- a/include/linux/tpm.h
+++ b/include/linux/tpm.h
@@ -46,6 +46,17 @@ struct tpm_class_ops {
};
+struct tpm_class_lowlevel {
+ void (*read_bytes)(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *result);
+ void (*write_bytes)(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *value);
+ u16 (*read16)(struct tpm_chip *chip, u32 addr);
+ void (*write16)(struct tpm_chip *chip, u32 addr, u16 src);
+ u32 (*read32)(struct tpm_chip *chip, u32 addr);
+ void (*write32)(struct tpm_chip *chip, u32 addr, u32 src);
+};
+
#if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)
extern int tpm_is_tpm2(u32 chip_num);
--
2.1.4
------------------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 02/10] tpm_tis: Extend low-level interface to support proper return codes
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:22 ` [PATCH 01/10] tpm_tis: Introduce intermediate layer for TPM access Christophe Ricard
@ 2016-04-10 21:22 ` Christophe Ricard
2016-04-10 21:22 ` [PATCH 03/10] tpm: Use read/write_bytes for drivers without more specialized methods Christophe Ricard
` (7 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:22 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
Though the ioread/iowrite calls cannot fail, other implementations of this
interface might want to return error codes if their communication fails.
This follows the usual pattern of negative values representing errors and
zero representing success. Positive values are not used (yet).
Errors are passed back to the caller if possible. If the interface of a
function does not allow that, it tries to do the most sensible thing it
can, but this might also mean ignoring the error in this instance.
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm.h | 35 ++++----
drivers/char/tpm/tpm_tis.c | 218 ++++++++++++++++++++++++++++++++++-----------
include/linux/tpm.h | 16 ++--
3 files changed, 188 insertions(+), 81 deletions(-)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index a8f48a2..e93e19b 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -467,44 +467,41 @@ static inline void tpm_buf_append_u32(struct tpm_buf *buf, const u32 value)
tpm_buf_append(buf, (u8 *) &value2, 4);
}
-static inline void tpm_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
- u8 *result)
+static inline int tpm_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *result)
{
- chip->lowlevel->read_bytes(chip, addr, len, result);
+ return chip->lowlevel->read_bytes(chip, addr, len, result);
}
-static inline u8 tpm_read8(struct tpm_chip *chip, u32 addr)
+static inline int tpm_read8(struct tpm_chip *chip, u32 addr, u8 *result)
{
- u8 result;
-
- chip->lowlevel->read_bytes(chip, addr, 1, &result);
- return result;
+ return chip->lowlevel->read_bytes(chip, addr, 1, result);
}
-static inline u16 tpm_read16(struct tpm_chip *chip, u32 addr)
+static inline int tpm_read16(struct tpm_chip *chip, u32 addr, u16 *result)
{
- return chip->lowlevel->read16(chip, addr);
+ return chip->lowlevel->read16(chip, addr, result);
}
-static inline u32 tpm_read32(struct tpm_chip *chip, u32 addr)
+static inline int tpm_read32(struct tpm_chip *chip, u32 addr, u32 *result)
{
- return chip->lowlevel->read32(chip, addr);
+ return chip->lowlevel->read32(chip, addr, result);
}
-static inline void tpm_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
- u8 *value)
+static inline int tpm_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *value)
{
- chip->lowlevel->write_bytes(chip, addr, len, value);
+ return chip->lowlevel->write_bytes(chip, addr, len, value);
}
-static inline void tpm_write8(struct tpm_chip *chip, u32 addr, u8 value)
+static inline int tpm_write8(struct tpm_chip *chip, u32 addr, u8 value)
{
- chip->lowlevel->write_bytes(chip, addr, 1, &value);
+ return chip->lowlevel->write_bytes(chip, addr, 1, &value);
}
-static inline void tpm_write32(struct tpm_chip *chip, u32 addr, u32 value)
+static inline int tpm_write32(struct tpm_chip *chip, u32 addr, u32 value)
{
- chip->lowlevel->write32(chip, addr, value);
+ return chip->lowlevel->write32(chip, addr, value);
}
extern struct class *tpm_class;
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index eb0b6802..ee5851e 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -134,8 +134,14 @@ static int wait_startup(struct tpm_chip *chip, int l)
{
unsigned long stop = jiffies + chip->timeout_a;
do {
- if (tpm_read8(chip, TPM_ACCESS(l)) &
- TPM_ACCESS_VALID)
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(chip, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
+
+ if (access & TPM_ACCESS_VALID)
return 0;
msleep(TPM_TIMEOUT);
} while (time_before(jiffies, stop));
@@ -145,9 +151,14 @@ static int wait_startup(struct tpm_chip *chip, int l)
static int check_locality(struct tpm_chip *chip, int l)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(chip, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
- if ((tpm_read8(chip, TPM_ACCESS(l)) &
- (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
+ if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
return priv->locality = l;
@@ -156,7 +167,14 @@ static int check_locality(struct tpm_chip *chip, int l)
static void release_locality(struct tpm_chip *chip, int l, int force)
{
- if (force || (tpm_read8(chip, TPM_ACCESS(l)) &
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(chip, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return;
+
+ if (force || (access &
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
(TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
@@ -172,8 +190,9 @@ static int request_locality(struct tpm_chip *chip, int l)
if (check_locality(chip, l) >= 0)
return l;
- tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
-
+ rc = tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
+ if (rc < 0)
+ return rc;
stop = jiffies + chip->timeout_a;
@@ -207,8 +226,14 @@ again:
static u8 tpm_tis_status(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 status;
- return tpm_read8(chip, TPM_STS(priv->locality));
+ rc = tpm_read8(chip, TPM_STS(priv->locality), &status);
+ if (rc < 0)
+ return 0;
+
+ return status;
}
static void tpm_tis_ready(struct tpm_chip *chip)
@@ -223,14 +248,23 @@ static int get_burstcount(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
unsigned long stop;
- int burstcnt;
+ int burstcnt, rc;
+ u8 value;
/* wait for burstcount */
/* which timeout value, spec has 2 answers (c & d) */
stop = jiffies + chip->timeout_d;
do {
- burstcnt = tpm_read8(chip, TPM_STS(priv->locality) + 1);
- burstcnt += tpm_read8(chip, TPM_STS(priv->locality) + 2) << 8;
+ rc = tpm_read8(chip, TPM_STS(priv->locality) + 1, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt = value;
+ rc = tpm_read8(chip, TPM_STS(priv->locality) + 2, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt += value << 8;
if (burstcnt)
return burstcnt;
msleep(TPM_TIMEOUT);
@@ -241,15 +275,19 @@ static int get_burstcount(struct tpm_chip *chip)
static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int size = 0, burstcnt;
+ int size = 0, burstcnt, rc;
while (size < count &&
wait_for_tpm_stat(chip,
TPM_STS_DATA_AVAIL | TPM_STS_VALID,
chip->timeout_c,
&priv->read_queue, true) == 0) {
burstcnt = min_t(int, get_burstcount(chip), count - size);
- tpm_read_bytes(chip, TPM_DATA_FIFO(priv->locality), burstcnt,
- buf + size);
+
+ rc = tpm_read_bytes(chip, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + size);
+ if (rc < 0)
+ return rc;
+
size += burstcnt;
}
return size;
@@ -333,8 +371,11 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
while (count < len - 1) {
burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
- tpm_write_bytes(chip, TPM_DATA_FIFO(priv->locality),
- burstcnt, buf + count);
+ rc = tpm_write_bytes(chip, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + count);
+ if (rc < 0)
+ goto out_err;
+
count += burstcnt;
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
@@ -347,7 +388,10 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
}
/* write last byte */
- tpm_write8(chip, TPM_DATA_FIFO(priv->locality), buf[count]);
+ rc = tpm_write8(chip, TPM_DATA_FIFO(priv->locality), buf[count]);
+ if (rc < 0)
+ goto out_err;
+
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
status = tpm_tis_status(chip);
@@ -368,10 +412,14 @@ static void disable_interrupts(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u32 intmask;
+ int rc;
+
+ rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ intmask = 0;
- intmask = tpm_read32(chip, TPM_INT_ENABLE(priv->locality));
intmask &= ~TPM_GLOBAL_INT_ENABLE;
- tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
+ rc = tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
devm_free_irq(&chip->dev, priv->irq, chip);
priv->irq = 0;
@@ -395,7 +443,10 @@ static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
return rc;
/* go and do it */
- tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_GO);
+ rc = tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_GO);
+ if (rc < 0)
+ goto out_err;
+
if (chip->flags & TPM_CHIP_FLAG_IRQ) {
ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
@@ -455,10 +506,12 @@ static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
unsigned long *timeout_cap)
{
- int i;
+ int i, rc;
u32 did_vid;
- did_vid = tpm_read32(chip, TPM_DID_VID(0));
+ rc = tpm_read32(chip, TPM_DID_VID(0), &did_vid);
+ if (rc < 0)
+ return rc;
for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
if (vendor_timeout_overrides[i].did_vid != did_vid)
@@ -486,7 +539,11 @@ static int probe_itpm(struct tpm_chip *chip)
};
size_t len = sizeof(cmd_getticks);
bool rem_itpm = itpm;
- u16 vendor = tpm_read16(chip, TPM_DID_VID(0));
+ u16 vendor;
+
+ rc = tpm_read16(chip, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ return rc;
/* probe only iTPMS */
if (vendor != TPM_VID_INTEL)
@@ -544,50 +601,56 @@ static const struct tpm_class_ops tpm_tis = {
.req_canceled = tpm_tis_req_canceled,
};
-static void tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
- u8 *result)
+static int tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *result)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
while (len--)
*result++ = ioread8(priv->iobase + addr);
+ return 0;
}
-static void tpm_mem_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
- u8 *value)
+static int tpm_mem_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *value)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
while (len--)
iowrite8(*value++, priv->iobase + addr);
+ return 0;
}
-static u16 tpm_mem_read16(struct tpm_chip *chip, u32 addr)
+static int tpm_mem_read16(struct tpm_chip *chip, u32 addr, u16 *result)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
- return ioread16(priv->iobase + addr);
+ *result = ioread16(priv->iobase + addr);
+ return 0;
}
-static void tpm_mem_write16(struct tpm_chip *chip, u32 addr, u16 value)
+static int tpm_mem_write16(struct tpm_chip *chip, u32 addr, u16 value)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
iowrite16(value, priv->iobase + addr);
+ return 0;
}
-static u32 tpm_mem_read32(struct tpm_chip *chip, u32 addr)
+static int tpm_mem_read32(struct tpm_chip *chip, u32 addr, u32 *result)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
- return ioread32(priv->iobase + addr);
+ *result = ioread32(priv->iobase + addr);
+ return 0;
}
-static void tpm_mem_write32(struct tpm_chip *chip, u32 addr, u32 value)
+static int tpm_mem_write32(struct tpm_chip *chip, u32 addr, u32 value)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
iowrite32(value, priv->iobase + addr);
+ return 0;
}
static const struct tpm_class_lowlevel tpm_mem = {
@@ -604,9 +667,11 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
struct tpm_chip *chip = dev_id;
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u32 interrupt;
- int i;
+ int i, rc;
- interrupt = tpm_read32(chip, TPM_INT_STATUS(priv->locality));
+ rc = tpm_read32(chip, TPM_INT_STATUS(priv->locality), &interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
if (interrupt == 0)
return IRQ_NONE;
@@ -624,9 +689,11 @@ static irqreturn_t tis_int_handler(int dummy, void *dev_id)
wake_up_interruptible(&priv->int_queue);
/* Clear interrupts handled with TPM_EOI */
- tpm_write32(chip, TPM_INT_STATUS(priv->locality), interrupt);
+ rc = tpm_write32(chip, TPM_INT_STATUS(priv->locality), interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
- tpm_read32(chip, TPM_INT_STATUS(priv->locality));
+ tpm_read32(chip, TPM_INT_STATUS(priv->locality), &interrupt);
return IRQ_HANDLED;
}
@@ -639,6 +706,8 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u8 original_int_vec;
+ int rc;
+ u32 int_status;
if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
dev_name(&chip->dev), chip) != 0) {
@@ -648,16 +717,28 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
}
priv->irq = irq;
- original_int_vec = tpm_read8(chip, TPM_INT_VECTOR(priv->locality));
- tpm_write8(chip, TPM_INT_VECTOR(priv->locality), irq);
+ rc = tpm_read8(chip, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality), irq);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_read32(chip, TPM_INT_STATUS(priv->locality), &int_status);
+ if (rc < 0)
+ return rc;
/* Clear all existing */
- tpm_write32(chip, TPM_INT_STATUS(priv->locality),
- tpm_read32(chip, TPM_INT_STATUS(priv->locality)));
+ rc = tpm_write32(chip, TPM_INT_STATUS(priv->locality), int_status);
+ if (rc < 0)
+ return rc;
/* Turn on */
- tpm_write32(chip, TPM_INT_ENABLE(priv->locality),
- intmask | TPM_GLOBAL_INT_ENABLE);
+ rc = tpm_write32(chip, TPM_INT_ENABLE(priv->locality),
+ intmask | TPM_GLOBAL_INT_ENABLE);
+ if (rc < 0)
+ return rc;
priv->irq_tested = false;
@@ -673,8 +754,10 @@ static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
* will call disable_irq which undoes all of the above.
*/
if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
- tpm_write8(chip, TPM_INT_VECTOR(priv->locality),
- original_int_vec);
+ rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality),
+ original_int_vec);
+ if (rc < 0)
+ return rc;
return 1;
}
@@ -690,9 +773,11 @@ static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u8 original_int_vec;
- int i;
+ int i, rc;
- original_int_vec = tpm_read8(chip, TPM_INT_VECTOR(priv->locality));
+ rc = tpm_read8(chip, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return;
if (!original_int_vec) {
if (IS_ENABLED(CONFIG_X86))
@@ -713,11 +798,17 @@ static void tpm_tis_remove(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u32 reg = TPM_INT_ENABLE(priv->locality);
+ u32 interrupt;
+ int rc;
if (chip->flags & TPM_CHIP_FLAG_TPM2)
tpm2_shutdown(chip, TPM2_SU_CLEAR);
- tpm_write32(chip, reg, ~TPM_GLOBAL_INT_ENABLE & tpm_read32(chip, reg));
+ rc = tpm_read32(chip, reg, &interrupt);
+ if (rc < 0)
+ interrupt = 0;
+
+ tpm_write32(chip, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
release_locality(chip, priv->locality, 1);
}
@@ -725,6 +816,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
acpi_handle acpi_dev_handle)
{
u32 vendor, intfcaps, intmask;
+ u8 rid;
int rc, probe;
struct tpm_chip *chip;
struct priv_data *priv;
@@ -761,7 +853,10 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
}
/* Take control of the TPM's interrupt hardware and shut it off */
- intmask = tpm_read32(chip, TPM_INT_ENABLE(priv->locality));
+ rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ goto out_err;
+
intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
intmask &= ~TPM_GLOBAL_INT_ENABLE;
@@ -776,12 +871,19 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
if (rc)
goto out_err;
- vendor = tpm_read32(chip, TPM_DID_VID(0));
+ rc = tpm_read32(chip, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ goto out_err;
+
priv->manufacturer_id = vendor;
+ rc = tpm_read8(chip, TPM_RID(0), &rid);
+ if (rc < 0)
+ goto out_err;
+
dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
- vendor >> 16, tpm_read8(chip, TPM_RID(0)));
+ vendor >> 16, rid);
if (!itpm) {
probe = probe_itpm(chip);
@@ -797,7 +899,10 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
/* Figure out the capabilities */
- intfcaps = tpm_read32(chip, TPM_INTF_CAPS(priv->locality));
+ rc = tpm_read32(chip, TPM_INTF_CAPS(priv->locality), &intfcaps);
+ if (rc < 0)
+ goto out_err;
+
dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
intfcaps);
if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
@@ -877,12 +982,17 @@ static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
u32 intmask;
+ int rc;
/* reenable interrupts that device may have lost or
BIOS/firmware may have disabled */
- tpm_write8(chip, TPM_INT_VECTOR(priv->locality), priv->irq);
+ rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality), priv->irq);
+ if (rc < 0)
+ return;
- intmask = tpm_read32(chip, TPM_INT_ENABLE(priv->locality));
+ rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ return;
intmask |= TPM_INTF_CMD_READY_INT
| TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
diff --git a/include/linux/tpm.h b/include/linux/tpm.h
index 19d5d426..e66b413 100644
--- a/include/linux/tpm.h
+++ b/include/linux/tpm.h
@@ -47,14 +47,14 @@ struct tpm_class_ops {
};
struct tpm_class_lowlevel {
- void (*read_bytes)(struct tpm_chip *chip, u32 addr, u16 len,
- u8 *result);
- void (*write_bytes)(struct tpm_chip *chip, u32 addr, u16 len,
- u8 *value);
- u16 (*read16)(struct tpm_chip *chip, u32 addr);
- void (*write16)(struct tpm_chip *chip, u32 addr, u16 src);
- u32 (*read32)(struct tpm_chip *chip, u32 addr);
- void (*write32)(struct tpm_chip *chip, u32 addr, u32 src);
+ int (*read_bytes)(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *result);
+ int (*write_bytes)(struct tpm_chip *chip, u32 addr, u16 len,
+ u8 *value);
+ int (*read16)(struct tpm_chip *chip, u32 addr, u16 *result);
+ int (*write16)(struct tpm_chip *chip, u32 addr, u16 src);
+ int (*read32)(struct tpm_chip *chip, u32 addr, u32 *result);
+ int (*write32)(struct tpm_chip *chip, u32 addr, u32 src);
};
#if defined(CONFIG_TCG_TPM) || defined(CONFIG_TCG_TPM_MODULE)
--
2.1.4
------------------------------------------------------------------------------
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gampad/clk?id=1444514301&iu=/ca-pub-7940484522588532
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 03/10] tpm: Use read/write_bytes for drivers without more specialized methods
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:22 ` [PATCH 01/10] tpm_tis: Introduce intermediate layer for TPM access Christophe Ricard
2016-04-10 21:22 ` [PATCH 02/10] tpm_tis: Extend low-level interface to support proper return codes Christophe Ricard
@ 2016-04-10 21:22 ` Christophe Ricard
2016-04-10 21:23 ` [PATCH 04/10] tpm: Manage itpm workaround with tis specific data_expect bit Christophe Ricard
` (6 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:22 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
Some drivers might choose to implement only functions for transferring an
arbitrary number of bytes, without special handling of word or dword
transfers.
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm.h | 33 ++++++++++++++++++++++++++++-----
1 file changed, 28 insertions(+), 5 deletions(-)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index e93e19b..68ce900 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -475,17 +475,35 @@ static inline int tpm_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
static inline int tpm_read8(struct tpm_chip *chip, u32 addr, u8 *result)
{
- return chip->lowlevel->read_bytes(chip, addr, 1, result);
+ return chip->lowlevel->read_bytes(chip, addr, sizeof(u8), result);
}
static inline int tpm_read16(struct tpm_chip *chip, u32 addr, u16 *result)
{
- return chip->lowlevel->read16(chip, addr, result);
+ int rc;
+
+ if (chip->lowlevel->read16)
+ return chip->lowlevel->read16(chip, addr, result);
+
+ rc = chip->lowlevel->read_bytes(chip, addr, sizeof(u16), (u8 *)result);
+ if (!rc)
+ *result = le16_to_cpu(*result);
+
+ return rc;
}
static inline int tpm_read32(struct tpm_chip *chip, u32 addr, u32 *result)
{
- return chip->lowlevel->read32(chip, addr, result);
+ int rc;
+
+ if (chip->lowlevel->read32)
+ return chip->lowlevel->read32(chip, addr, result);
+
+ rc = chip->lowlevel->read_bytes(chip, addr, sizeof(u32), (u8 *)result);
+ if (!rc)
+ *result = le32_to_cpu(*result);
+
+ return rc;
}
static inline int tpm_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
@@ -496,12 +514,17 @@ static inline int tpm_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
static inline int tpm_write8(struct tpm_chip *chip, u32 addr, u8 value)
{
- return chip->lowlevel->write_bytes(chip, addr, 1, &value);
+ return chip->lowlevel->write_bytes(chip, addr, sizeof(u8), &value);
}
static inline int tpm_write32(struct tpm_chip *chip, u32 addr, u32 value)
{
- return chip->lowlevel->write32(chip, addr, value);
+ if (chip->lowlevel->write32)
+ return chip->lowlevel->write32(chip, addr, value);
+
+ value = cpu_to_le32(value);
+ return chip->lowlevel->write_bytes(chip, addr, sizeof(u32),
+ (u8 *)&value);
}
extern struct class *tpm_class;
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial! http://pubads.g.doubleclick.net/
gampad/clk?id=1444514301&iu=/ca-pub-7940484522588532
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 04/10] tpm: Manage itpm workaround with tis specific data_expect bit
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (2 preceding siblings ...)
2016-04-10 21:22 ` [PATCH 03/10] tpm: Use read/write_bytes for drivers without more specialized methods Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
[not found] ` <1460323386-16892-5-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:23 ` [PATCH 05/10] tpm: tpm_tis: Add post_probe phy handler Christophe Ricard
` (5 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
In order to keep this itpm workaround available after the tpm_tis rework,
we are changing the way it is managed by using a tpm_tis_phy_ops structure
allowing to manage TPM_STS_EXPECT_DATA bit behavior according to different
TPM vendor.
Those 2 fields might be used only for tpm_tis (lpc) phy in the future.
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm_tis.c | 27 ++++++++++++++++++++++++---
1 file changed, 24 insertions(+), 3 deletions(-)
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index ee5851e..5b3eb26 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -93,6 +93,11 @@ struct tpm_info {
#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
#define TPM_RID(l) (0x0F04 | ((l) << 12))
+struct tpm_tis_phy_ops {
+ u8 data_expect_mask;
+ u8 data_expect_val;
+};
+
struct priv_data {
void __iomem *iobase;
u16 manufacturer_id;
@@ -101,6 +106,7 @@ struct priv_data {
bool irq_tested;
wait_queue_head_t int_queue;
wait_queue_head_t read_queue;
+ struct tpm_tis_phy_ops *phy_ops;
};
#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
@@ -381,7 +387,8 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
status = tpm_tis_status(chip);
- if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
+ if ((status & priv->phy_ops->data_expect_mask) !=
+ priv->phy_ops->data_expect_val) {
rc = -EIO;
goto out_err;
}
@@ -395,7 +402,8 @@ static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
&priv->int_queue, false);
status = tpm_tis_status(chip);
- if ((status & TPM_STS_DATA_EXPECT) != 0) {
+ if ((status & priv->phy_ops->data_expect_mask) ==
+ priv->phy_ops->data_expect_mask) {
rc = -EIO;
goto out_err;
}
@@ -532,6 +540,8 @@ static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
static int probe_itpm(struct tpm_chip *chip)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u8 data_expect_mask = priv->phy_ops->data_expect_mask;
+ u8 data_expect_val = priv->phy_ops->data_expect_val;
int rc = 0;
u8 cmd_getticks[] = {
0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
@@ -559,13 +569,18 @@ static int probe_itpm(struct tpm_chip *chip)
release_locality(chip, priv->locality, 0);
itpm = true;
+ priv->phy_ops->data_expect_mask = 0;
+ priv->phy_ops->data_expect_val = 0;
rc = tpm_tis_send_data(chip, cmd_getticks, len);
if (rc == 0) {
dev_info(&chip->dev, "Detected an iTPM.\n");
rc = 1;
- } else
+ } else {
+ priv->phy_ops->data_expect_mask = data_expect_mask;
+ priv->phy_ops->data_expect_val = data_expect_val;
rc = -EFAULT;
+ }
out:
itpm = rem_itpm;
@@ -601,6 +616,11 @@ static const struct tpm_class_ops tpm_tis = {
.req_canceled = tpm_tis_req_canceled,
};
+static struct tpm_tis_phy_ops tis_phy_ops = {
+ .data_expect_mask = TPM_STS_DATA_EXPECT,
+ .data_expect_val = TPM_STS_DATA_EXPECT,
+};
+
static int tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
u8 *result)
{
@@ -844,6 +864,7 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
chip->timeout_b = TIS_TIMEOUT_B_MAX;
chip->timeout_c = TIS_TIMEOUT_C_MAX;
chip->timeout_d = TIS_TIMEOUT_D_MAX;
+ priv->phy_ops = &tis_phy_ops;
dev_set_drvdata(&chip->dev, priv);
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial! http://pubads.g.doubleclick.net/
gampad/clk?id=1444514301&iu=/ca-pub-7940484522588532
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 05/10] tpm: tpm_tis: Add post_probe phy handler
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (3 preceding siblings ...)
2016-04-10 21:23 ` [PATCH 04/10] tpm: Manage itpm workaround with tis specific data_expect bit Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
[not found] ` <1460323386-16892-6-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:23 ` [PATCH 06/10] tpm: Add include guards in tpm.h Christophe Ricard
` (4 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
Add post_probe phy handler in order to execute additional proprietary
operations after tpm2_probe. For the case of tpm_tis using LPC, itpm
workaround probing.
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm_tis.c | 30 ++++++++++++++++++++++--------
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 5b3eb26..2267093 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -96,6 +96,7 @@ struct tpm_info {
struct tpm_tis_phy_ops {
u8 data_expect_mask;
u8 data_expect_val;
+ int (*post_probe)(struct tpm_chip *chip);
};
struct priv_data {
@@ -619,6 +620,7 @@ static const struct tpm_class_ops tpm_tis = {
static struct tpm_tis_phy_ops tis_phy_ops = {
.data_expect_mask = TPM_STS_DATA_EXPECT,
.data_expect_val = TPM_STS_DATA_EXPECT,
+ .post_probe = tpm_tis_post_probe,
};
static int tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
@@ -810,6 +812,23 @@ static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
return;
}
+static int tpm_tis_post_probe(struct tpm_chip *chip)
+{
+ int probe;
+
+ if (!itpm) {
+ probe = probe_itpm(chip);
+ if (probe < 0)
+ return -ENODEV;
+ itpm = !!probe;
+ }
+
+ if (itpm)
+ dev_info(chip->dev.parent, "Intel iTPM workaround enabled\n");
+
+ return 0;
+}
+
static bool interrupts = true;
module_param(interrupts, bool, 0444);
MODULE_PARM_DESC(interrupts, "Enable interrupts");
@@ -906,19 +925,14 @@ static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
(chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
vendor >> 16, rid);
- if (!itpm) {
- probe = probe_itpm(chip);
- if (probe < 0) {
+ if (priv->phy_ops && priv->phy_ops->post_probe) {
+ rc = priv->phy_ops->post_probe(chip);
+ if (rc < 0) {
rc = -ENODEV;
goto out_err;
}
- itpm = !!probe;
}
- if (itpm)
- dev_info(dev, "Intel iTPM workaround enabled\n");
-
-
/* Figure out the capabilities */
rc = tpm_read32(chip, TPM_INTF_CAPS(priv->locality), &intfcaps);
if (rc < 0)
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial! http://pubads.g.doubleclick.net/
gampad/clk?id=1444514301&iu=/ca-pub-7940484522588532
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 06/10] tpm: Add include guards in tpm.h
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (4 preceding siblings ...)
2016-04-10 21:23 ` [PATCH 05/10] tpm: tpm_tis: Add post_probe phy handler Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
2016-04-10 21:23 ` [PATCH 07/10] devicetree: Add infineon to vendor-prefix.txt Christophe Ricard
` (3 subsequent siblings)
9 siblings, 0 replies; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, Peter Huewe,
benoit.houyere-qxv4g6HH51o
Add missing include guards in tpm.h
Signed-off-by: Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/tpm.h | 5 +++++
1 file changed, 5 insertions(+)
diff --git a/drivers/char/tpm/tpm.h b/drivers/char/tpm/tpm.h
index 68ce900..87267cf 100644
--- a/drivers/char/tpm/tpm.h
+++ b/drivers/char/tpm/tpm.h
@@ -19,6 +19,10 @@
* License.
*
*/
+
+#ifndef __TPM_H__
+#define __TPM_H__
+
#include <linux/module.h>
#include <linux/delay.h>
#include <linux/fs.h>
@@ -588,3 +592,4 @@ extern unsigned long tpm2_calc_ordinal_duration(struct tpm_chip *, u32);
extern int tpm2_do_selftest(struct tpm_chip *chip);
extern int tpm2_gen_interrupt(struct tpm_chip *chip);
extern int tpm2_probe(struct tpm_chip *chip);
+#endif
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial! http://pubads.g.doubleclick.net/
gampad/clk?id=1444514301&iu=/ca-pub-7940484522588532
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 07/10] devicetree: Add infineon to vendor-prefix.txt
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (5 preceding siblings ...)
2016-04-10 21:23 ` [PATCH 06/10] tpm: Add include guards in tpm.h Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
[not found] ` <1460323386-16892-8-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:23 ` [PATCH 08/10] devicetree: Add Trusted Computing Group " Christophe Ricard
` (2 subsequent siblings)
9 siblings, 1 reply; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jgunthorpe-ePGOBjL8dl3ta4EC/59zMFaTQe2KTcn/,
peterhuewe-Mmb7MZpHnFY, Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w,
ashley-fm2HMyfA2y6tG0bUXCXiUA, tpmdd-yWjUBOtONefk1uMJSBkQmQ,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, jean-luc.blanc-qxv4g6HH51o,
benoit.houyere-qxv4g6HH51o, devicetree-u79uwXL29TY76Z2rM5mHXA
Add missing vendor to vendor-prefix.txt
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 72e2c5a..6c3d970 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -113,6 +113,7 @@ ibm International Business Machines (IBM)
idt Integrated Device Technologies, Inc.
iom Iomega Corporation
img Imagination Technologies Ltd.
+infineon Infineon Technologies
ingenic Ingenic Semiconductor
innolux Innolux Corporation
intel Intel Corporation
--
2.1.4
--
To unsubscribe from this list: send the line "unsubscribe devicetree" in
the body of a message to majordomo-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
More majordomo info at http://vger.kernel.org/majordomo-info.html
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 08/10] devicetree: Add Trusted Computing Group to vendor-prefix.txt
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (6 preceding siblings ...)
2016-04-10 21:23 ` [PATCH 07/10] devicetree: Add infineon to vendor-prefix.txt Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
[not found] ` <1460323386-16892-9-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:23 ` [PATCH 09/10] tpm/tpm_tis: Split tpm_tis driver into a core and TCG TIS compliant phy Christophe Ricard
2016-04-10 21:23 ` [PATCH 10/10] tpm/tpm_tis_spi: Add support for spi phy Christophe Ricard
9 siblings, 1 reply; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA, jean-luc.blanc-qxv4g6HH51o,
ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, benoit.houyere-qxv4g6HH51o
Add missing vendor to vendor-prefix.txt.
Trusted Computing Group design common specifications for
TPM (Trusted Platform Module) vendors.
TCG designates a TPM answering to a public specification.
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 6c3d970..717bae9 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -230,6 +230,7 @@ stericsson ST-Ericsson
synology Synology, Inc.
tbs TBS Technologies
tcl Toby Churchill Ltd.
+tcg Trusted Computing Group
technologic Technologic Systems
thine THine Electronics, Inc.
ti Texas Instruments
--
2.1.4
------------------------------------------------------------------------------
Find and fix application performance issues faster with Applications Manager
Applications Manager provides deep performance insights into multiple tiers of
your business applications. It resolves application problems quickly and
reduces your MTTR. Get your free trial! http://pubads.g.doubleclick.net/
gampad/clk?id=1444514301&iu=/ca-pub-7940484522588532
^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 09/10] tpm/tpm_tis: Split tpm_tis driver into a core and TCG TIS compliant phy
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (7 preceding siblings ...)
2016-04-10 21:23 ` [PATCH 08/10] devicetree: Add Trusted Computing Group " Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
[not found] ` <1460323386-16892-10-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
2016-04-10 21:23 ` [PATCH 10/10] tpm/tpm_tis_spi: Add support for spi phy Christophe Ricard
9 siblings, 1 reply; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, Peter Huewe,
benoit.houyere-qxv4g6HH51o
To avoid code duplication between the old tpm_tis and the new and future
native tcg tis driver(ie: spi, i2c...), the tpm_tis driver was reworked,
so that all common logic is extracted and can be reused from all drivers.
The core methods can also be used from other TIS like drivers.
Signed-off-by: Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
drivers/char/tpm/Kconfig | 7 +
drivers/char/tpm/Makefile | 2 +-
drivers/char/tpm/tpm_tis.c | 912 +++-------------------------------------
drivers/char/tpm/tpm_tis_core.c | 782 ++++++++++++++++++++++++++++++++++
drivers/char/tpm/tpm_tis_core.h | 122 ++++++
5 files changed, 980 insertions(+), 845 deletions(-)
create mode 100644 drivers/char/tpm/tpm_tis_core.c
create mode 100644 drivers/char/tpm/tpm_tis_core.h
diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig
index 3b84a8b..b217308 100644
--- a/drivers/char/tpm/Kconfig
+++ b/drivers/char/tpm/Kconfig
@@ -24,9 +24,16 @@ menuconfig TCG_TPM
if TCG_TPM
+config TCG_TIS_CORE
+ tristate
+ ---help---
+ TCG TIS TPM core driver. It implements the TPM TCG TIS logic and hooks
+ into the TPM kernel APIs. Physical layers will register against it.
+
config TCG_TIS
tristate "TPM Interface Specification 1.2 Interface / TPM 2.0 FIFO Interface"
depends on X86
+ select TCG_TIS_CORE
---help---
If you have a TPM security chip that is compliant with the
TCG TIS 1.2 TPM specification (TPM1.2) or the TCG PTP FIFO
diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile
index 56e8f1f..c6a4cea 100644
--- a/drivers/char/tpm/Makefile
+++ b/drivers/char/tpm/Makefile
@@ -2,7 +2,7 @@
# Makefile for the kernel tpm device drivers.
#
obj-$(CONFIG_TCG_TPM) += tpm.o
-tpm-y := tpm-interface.o tpm-dev.o tpm-sysfs.o tpm-chip.o tpm2-cmd.o
+tpm-y := tpm-interface.o tpm-dev.o tpm-sysfs.o tpm-chip.o tpm2-cmd.o tpm_tis_core.o
tpm-$(CONFIG_ACPI) += tpm_ppi.o
ifdef CONFIG_ACPI
diff --git a/drivers/char/tpm/tpm_tis.c b/drivers/char/tpm/tpm_tis.c
index 2267093..26d2c1c 100644
--- a/drivers/char/tpm/tpm_tis.c
+++ b/drivers/char/tpm/tpm_tis.c
@@ -29,40 +29,7 @@
#include <linux/acpi.h>
#include <linux/freezer.h>
#include "tpm.h"
-
-enum tis_access {
- TPM_ACCESS_VALID = 0x80,
- TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
- TPM_ACCESS_REQUEST_PENDING = 0x04,
- TPM_ACCESS_REQUEST_USE = 0x02,
-};
-
-enum tis_status {
- TPM_STS_VALID = 0x80,
- TPM_STS_COMMAND_READY = 0x40,
- TPM_STS_GO = 0x20,
- TPM_STS_DATA_AVAIL = 0x10,
- TPM_STS_DATA_EXPECT = 0x08,
-};
-
-enum tis_int_flags {
- TPM_GLOBAL_INT_ENABLE = 0x80000000,
- TPM_INTF_BURST_COUNT_STATIC = 0x100,
- TPM_INTF_CMD_READY_INT = 0x080,
- TPM_INTF_INT_EDGE_FALLING = 0x040,
- TPM_INTF_INT_EDGE_RISING = 0x020,
- TPM_INTF_INT_LEVEL_LOW = 0x010,
- TPM_INTF_INT_LEVEL_HIGH = 0x008,
- TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
- TPM_INTF_STS_VALID_INT = 0x002,
- TPM_INTF_DATA_AVAIL_INT = 0x001,
-};
-
-enum tis_defaults {
- TIS_MEM_LEN = 0x5000,
- TIS_SHORT_TIMEOUT = 750, /* ms */
- TIS_LONG_TIMEOUT = 2000, /* 2 sec */
-};
+#include "tpm_tis_core.h"
struct tpm_info {
struct resource res;
@@ -73,41 +40,28 @@ struct tpm_info {
int irq;
};
-/* Some timeout values are needed before it is known whether the chip is
- * TPM 1.0 or TPM 2.0.
- */
-#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
-#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
-#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
-#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
-
-#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
-#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
-#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
-#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
-#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
-#define TPM_STS(l) (0x0018 | ((l) << 12))
-#define TPM_STS3(l) (0x001b | ((l) << 12))
-#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
-
-#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
-#define TPM_RID(l) (0x0F04 | ((l) << 12))
-
-struct tpm_tis_phy_ops {
- u8 data_expect_mask;
- u8 data_expect_val;
- int (*post_probe)(struct tpm_chip *chip);
+struct tpm_tis_phy {
+ void __iomem *iobase;
};
-struct priv_data {
- void __iomem *iobase;
- u16 manufacturer_id;
- int locality;
- int irq;
- bool irq_tested;
- wait_queue_head_t int_queue;
- wait_queue_head_t read_queue;
- struct tpm_tis_phy_ops *phy_ops;
+static bool interrupts = true;
+module_param(interrupts, bool, 0444);
+MODULE_PARM_DESC(interrupts, "Enable interrupts");
+
+static bool itpm;
+module_param(itpm, bool, 0444);
+MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
+
+static bool force;
+#ifdef CONFIG_X86
+module_param(force, bool, 0444);
+MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
+#endif
+
+static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
+ /* Atmel 3204 */
+ { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
+ (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
};
#if defined(CONFIG_PNP) && defined(CONFIG_ACPI)
@@ -133,385 +87,6 @@ static inline int is_itpm(struct acpi_device *dev)
}
#endif
-/* Before we attempt to access the TPM we must see that the valid bit is set.
- * The specification says that this bit is 0 at reset and remains 0 until the
- * 'TPM has gone through its self test and initialization and has established
- * correct values in the other bits.' */
-static int wait_startup(struct tpm_chip *chip, int l)
-{
- unsigned long stop = jiffies + chip->timeout_a;
- do {
- int rc;
- u8 access;
-
- rc = tpm_read8(chip, TPM_ACCESS(l), &access);
- if (rc < 0)
- return rc;
-
- if (access & TPM_ACCESS_VALID)
- return 0;
- msleep(TPM_TIMEOUT);
- } while (time_before(jiffies, stop));
- return -1;
-}
-
-static int check_locality(struct tpm_chip *chip, int l)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u8 access;
-
- rc = tpm_read8(chip, TPM_ACCESS(l), &access);
- if (rc < 0)
- return rc;
-
- if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
- (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
- return priv->locality = l;
-
- return -1;
-}
-
-static void release_locality(struct tpm_chip *chip, int l, int force)
-{
- int rc;
- u8 access;
-
- rc = tpm_read8(chip, TPM_ACCESS(l), &access);
- if (rc < 0)
- return;
-
- if (force || (access &
- (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
- (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
- tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
-
-}
-
-static int request_locality(struct tpm_chip *chip, int l)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- unsigned long stop, timeout;
- long rc;
-
- if (check_locality(chip, l) >= 0)
- return l;
-
- rc = tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
- if (rc < 0)
- return rc;
-
- stop = jiffies + chip->timeout_a;
-
- if (chip->flags & TPM_CHIP_FLAG_IRQ) {
-again:
- timeout = stop - jiffies;
- if ((long)timeout <= 0)
- return -1;
- rc = wait_event_interruptible_timeout(priv->int_queue,
- (check_locality
- (chip, l) >= 0),
- timeout);
- if (rc > 0)
- return l;
- if (rc == -ERESTARTSYS && freezing(current)) {
- clear_thread_flag(TIF_SIGPENDING);
- goto again;
- }
- } else {
- /* wait for burstcount */
- do {
- if (check_locality(chip, l) >= 0)
- return l;
- msleep(TPM_TIMEOUT);
- }
- while (time_before(jiffies, stop));
- }
- return -1;
-}
-
-static u8 tpm_tis_status(struct tpm_chip *chip)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u8 status;
-
- rc = tpm_read8(chip, TPM_STS(priv->locality), &status);
- if (rc < 0)
- return 0;
-
- return status;
-}
-
-static void tpm_tis_ready(struct tpm_chip *chip)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
-
- /* this causes the current command to be aborted */
- tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
-}
-
-static int get_burstcount(struct tpm_chip *chip)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- unsigned long stop;
- int burstcnt, rc;
- u8 value;
-
- /* wait for burstcount */
- /* which timeout value, spec has 2 answers (c & d) */
- stop = jiffies + chip->timeout_d;
- do {
- rc = tpm_read8(chip, TPM_STS(priv->locality) + 1, &value);
- if (rc < 0)
- return rc;
-
- burstcnt = value;
- rc = tpm_read8(chip, TPM_STS(priv->locality) + 2, &value);
- if (rc < 0)
- return rc;
-
- burstcnt += value << 8;
- if (burstcnt)
- return burstcnt;
- msleep(TPM_TIMEOUT);
- } while (time_before(jiffies, stop));
- return -EBUSY;
-}
-
-static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int size = 0, burstcnt, rc;
- while (size < count &&
- wait_for_tpm_stat(chip,
- TPM_STS_DATA_AVAIL | TPM_STS_VALID,
- chip->timeout_c,
- &priv->read_queue, true) == 0) {
- burstcnt = min_t(int, get_burstcount(chip), count - size);
-
- rc = tpm_read_bytes(chip, TPM_DATA_FIFO(priv->locality),
- burstcnt, buf + size);
- if (rc < 0)
- return rc;
-
- size += burstcnt;
- }
- return size;
-}
-
-static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int size = 0;
- int expected, status;
-
- if (count < TPM_HEADER_SIZE) {
- size = -EIO;
- goto out;
- }
-
- /* read first 10 bytes, including tag, paramsize, and result */
- if ((size =
- recv_data(chip, buf, TPM_HEADER_SIZE)) < TPM_HEADER_SIZE) {
- dev_err(&chip->dev, "Unable to read header\n");
- goto out;
- }
-
- expected = be32_to_cpu(*(__be32 *) (buf + 2));
- if (expected > count) {
- size = -EIO;
- goto out;
- }
-
- if ((size +=
- recv_data(chip, &buf[TPM_HEADER_SIZE],
- expected - TPM_HEADER_SIZE)) < expected) {
- dev_err(&chip->dev, "Unable to read remainder of result\n");
- size = -ETIME;
- goto out;
- }
-
- wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
- &priv->int_queue, false);
- status = tpm_tis_status(chip);
- if (status & TPM_STS_DATA_AVAIL) { /* retry? */
- dev_err(&chip->dev, "Error left over data\n");
- size = -EIO;
- goto out;
- }
-
-out:
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
- return size;
-}
-
-static bool itpm;
-module_param(itpm, bool, 0444);
-MODULE_PARM_DESC(itpm, "Force iTPM workarounds (found on some Lenovo laptops)");
-
-/*
- * If interrupts are used (signaled by an irq set in the vendor structure)
- * tpm.c can skip polling for the data to be available as the interrupt is
- * waited for here
- */
-static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int rc, status, burstcnt;
- size_t count = 0;
-
- if (request_locality(chip, 0) < 0)
- return -EBUSY;
-
- status = tpm_tis_status(chip);
- if ((status & TPM_STS_COMMAND_READY) == 0) {
- tpm_tis_ready(chip);
- if (wait_for_tpm_stat
- (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
- &priv->int_queue, false) < 0) {
- rc = -ETIME;
- goto out_err;
- }
- }
-
- while (count < len - 1) {
- burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
- rc = tpm_write_bytes(chip, TPM_DATA_FIFO(priv->locality),
- burstcnt, buf + count);
- if (rc < 0)
- goto out_err;
-
- count += burstcnt;
-
- wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
- &priv->int_queue, false);
- status = tpm_tis_status(chip);
- if ((status & priv->phy_ops->data_expect_mask) !=
- priv->phy_ops->data_expect_val) {
- rc = -EIO;
- goto out_err;
- }
- }
-
- /* write last byte */
- rc = tpm_write8(chip, TPM_DATA_FIFO(priv->locality), buf[count]);
- if (rc < 0)
- goto out_err;
-
- wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
- &priv->int_queue, false);
- status = tpm_tis_status(chip);
- if ((status & priv->phy_ops->data_expect_mask) ==
- priv->phy_ops->data_expect_mask) {
- rc = -EIO;
- goto out_err;
- }
-
- return 0;
-
-out_err:
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
- return rc;
-}
-
-static void disable_interrupts(struct tpm_chip *chip)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- u32 intmask;
- int rc;
-
- rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
- if (rc < 0)
- intmask = 0;
-
- intmask &= ~TPM_GLOBAL_INT_ENABLE;
- rc = tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
-
- devm_free_irq(&chip->dev, priv->irq, chip);
- priv->irq = 0;
- chip->flags &= ~TPM_CHIP_FLAG_IRQ;
-}
-
-/*
- * If interrupts are used (signaled by an irq set in the vendor structure)
- * tpm.c can skip polling for the data to be available as the interrupt is
- * waited for here
- */
-static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- int rc;
- u32 ordinal;
- unsigned long dur;
-
- rc = tpm_tis_send_data(chip, buf, len);
- if (rc < 0)
- return rc;
-
- /* go and do it */
- rc = tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_GO);
- if (rc < 0)
- goto out_err;
-
- if (chip->flags & TPM_CHIP_FLAG_IRQ) {
- ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
-
- if (chip->flags & TPM_CHIP_FLAG_TPM2)
- dur = tpm2_calc_ordinal_duration(chip, ordinal);
- else
- dur = tpm_calc_ordinal_duration(chip, ordinal);
-
- if (wait_for_tpm_stat
- (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
- &priv->read_queue, false) < 0) {
- rc = -ETIME;
- goto out_err;
- }
- }
- return len;
-out_err:
- tpm_tis_ready(chip);
- release_locality(chip, priv->locality, 0);
- return rc;
-}
-
-static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
-{
- int rc, irq;
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
-
- if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
- return tpm_tis_send_main(chip, buf, len);
-
- /* Verify receipt of the expected IRQ */
- irq = priv->irq;
- priv->irq = 0;
- chip->flags &= ~TPM_CHIP_FLAG_IRQ;
- rc = tpm_tis_send_main(chip, buf, len);
- priv->irq = irq;
- chip->flags |= TPM_CHIP_FLAG_IRQ;
- if (!priv->irq_tested)
- msleep(1);
- if (!priv->irq_tested)
- disable_interrupts(chip);
- priv->irq_tested = true;
- return rc;
-}
-
-struct tis_vendor_timeout_override {
- u32 did_vid;
- unsigned long timeout_us[4];
-};
-
-static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
- /* Atmel 3204 */
- { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
- (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
-};
-
static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
unsigned long *timeout_cap)
{
@@ -591,45 +166,14 @@ out:
return rc;
}
-static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
-
- switch (priv->manufacturer_id) {
- case TPM_VID_WINBOND:
- return ((status == TPM_STS_VALID) ||
- (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
- case TPM_VID_STM:
- return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
- default:
- return (status == TPM_STS_COMMAND_READY);
- }
-}
-
-static const struct tpm_class_ops tpm_tis = {
- .status = tpm_tis_status,
- .recv = tpm_tis_recv,
- .send = tpm_tis_send,
- .cancel = tpm_tis_ready,
- .update_timeouts = tpm_tis_update_timeouts,
- .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
- .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
- .req_canceled = tpm_tis_req_canceled,
-};
-
-static struct tpm_tis_phy_ops tis_phy_ops = {
- .data_expect_mask = TPM_STS_DATA_EXPECT,
- .data_expect_val = TPM_STS_DATA_EXPECT,
- .post_probe = tpm_tis_post_probe,
-};
-
static int tpm_mem_read_bytes(struct tpm_chip *chip, u32 addr, u16 len,
u8 *result)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_phy *phy = priv->phy_id;
while (len--)
- *result++ = ioread8(priv->iobase + addr);
+ *result++ = ioread8(phy->iobase + addr);
return 0;
}
@@ -637,181 +181,49 @@ static int tpm_mem_write_bytes(struct tpm_chip *chip, u32 addr, u16 len,
u8 *value)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_phy *phy = priv->phy_id;
while (len--)
- iowrite8(*value++, priv->iobase + addr);
+ iowrite8(*value++, phy->iobase + addr);
return 0;
}
static int tpm_mem_read16(struct tpm_chip *chip, u32 addr, u16 *result)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_phy *phy = priv->phy_id;
- *result = ioread16(priv->iobase + addr);
+ *result = ioread16(phy->iobase + addr);
return 0;
}
static int tpm_mem_write16(struct tpm_chip *chip, u32 addr, u16 value)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_phy *phy = priv->phy_id;
- iowrite16(value, priv->iobase + addr);
+ iowrite16(value, phy->iobase + addr);
return 0;
}
static int tpm_mem_read32(struct tpm_chip *chip, u32 addr, u32 *result)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_phy *phy = priv->phy_id;
- *result = ioread32(priv->iobase + addr);
+ *result = ioread32(phy->iobase + addr);
return 0;
}
static int tpm_mem_write32(struct tpm_chip *chip, u32 addr, u32 value)
{
struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_phy *phy = priv->phy_id;
- iowrite32(value, priv->iobase + addr);
- return 0;
-}
-
-static const struct tpm_class_lowlevel tpm_mem = {
- .read_bytes = tpm_mem_read_bytes,
- .write_bytes = tpm_mem_write_bytes,
- .read16 = tpm_mem_read16,
- .write16 = tpm_mem_write16,
- .read32 = tpm_mem_read32,
- .write32 = tpm_mem_write32,
-};
-
-static irqreturn_t tis_int_handler(int dummy, void *dev_id)
-{
- struct tpm_chip *chip = dev_id;
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- u32 interrupt;
- int i, rc;
-
- rc = tpm_read32(chip, TPM_INT_STATUS(priv->locality), &interrupt);
- if (rc < 0)
- return IRQ_NONE;
-
- if (interrupt == 0)
- return IRQ_NONE;
-
- priv->irq_tested = true;
- if (interrupt & TPM_INTF_DATA_AVAIL_INT)
- wake_up_interruptible(&priv->read_queue);
- if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
- for (i = 0; i < 5; i++)
- if (check_locality(chip, i) >= 0)
- break;
- if (interrupt &
- (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
- TPM_INTF_CMD_READY_INT))
- wake_up_interruptible(&priv->int_queue);
-
- /* Clear interrupts handled with TPM_EOI */
- rc = tpm_write32(chip, TPM_INT_STATUS(priv->locality), interrupt);
- if (rc < 0)
- return IRQ_NONE;
-
- tpm_read32(chip, TPM_INT_STATUS(priv->locality), &interrupt);
- return IRQ_HANDLED;
-}
-
-/* Register the IRQ and issue a command that will cause an interrupt. If an
- * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
- * everything and leave in polling mode. Returns 0 on success.
- */
-static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
- int flags, int irq)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- u8 original_int_vec;
- int rc;
- u32 int_status;
-
- if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
- dev_name(&chip->dev), chip) != 0) {
- dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
- irq);
- return -1;
- }
- priv->irq = irq;
-
- rc = tpm_read8(chip, TPM_INT_VECTOR(priv->locality), &original_int_vec);
- if (rc < 0)
- return rc;
-
- rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality), irq);
- if (rc < 0)
- return rc;
-
- rc = tpm_read32(chip, TPM_INT_STATUS(priv->locality), &int_status);
- if (rc < 0)
- return rc;
-
- /* Clear all existing */
- rc = tpm_write32(chip, TPM_INT_STATUS(priv->locality), int_status);
- if (rc < 0)
- return rc;
-
- /* Turn on */
- rc = tpm_write32(chip, TPM_INT_ENABLE(priv->locality),
- intmask | TPM_GLOBAL_INT_ENABLE);
- if (rc < 0)
- return rc;
-
- priv->irq_tested = false;
-
- /* Generate an interrupt by having the core call through to
- * tpm_tis_send
- */
- if (chip->flags & TPM_CHIP_FLAG_TPM2)
- tpm2_gen_interrupt(chip);
- else
- tpm_gen_interrupt(chip);
-
- /* tpm_tis_send will either confirm the interrupt is working or it
- * will call disable_irq which undoes all of the above.
- */
- if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
- rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality),
- original_int_vec);
- if (rc < 0)
- return rc;
-
- return 1;
- }
-
+ iowrite32(value, phy->iobase + addr);
return 0;
}
-/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
- * do not have ACPI/etc. We typically expect the interrupt to be declared if
- * present.
- */
-static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- u8 original_int_vec;
- int i, rc;
-
- rc = tpm_read8(chip, TPM_INT_VECTOR(priv->locality), &original_int_vec);
- if (rc < 0)
- return;
-
- if (!original_int_vec) {
- if (IS_ENABLED(CONFIG_X86))
- for (i = 3; i <= 15; i++)
- if (!tpm_tis_probe_irq_single(chip, intmask, 0,
- i))
- return;
- } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
- original_int_vec))
- return;
-}
-
static int tpm_tis_post_probe(struct tpm_chip *chip)
{
int probe;
@@ -829,235 +241,53 @@ static int tpm_tis_post_probe(struct tpm_chip *chip)
return 0;
}
-static bool interrupts = true;
-module_param(interrupts, bool, 0444);
-MODULE_PARM_DESC(interrupts, "Enable interrupts");
-
-static void tpm_tis_remove(struct tpm_chip *chip)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- u32 reg = TPM_INT_ENABLE(priv->locality);
- u32 interrupt;
- int rc;
-
- if (chip->flags & TPM_CHIP_FLAG_TPM2)
- tpm2_shutdown(chip, TPM2_SU_CLEAR);
+static const struct tpm_class_ops tpm_tis = {
+ .status = tpm_tis_status,
+ .recv = tpm_tis_recv,
+ .send = tpm_tis_send,
+ .cancel = tpm_tis_ready,
+ .update_timeouts = tpm_tis_update_timeouts,
+ .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ .req_canceled = tpm_tis_req_canceled,
+};
- rc = tpm_read32(chip, reg, &interrupt);
- if (rc < 0)
- interrupt = 0;
+static struct tpm_tis_phy_ops tis_phy_ops = {
+ .data_expect_mask = TPM_STS_DATA_EXPECT,
+ .data_expect_val = TPM_STS_DATA_EXPECT,
+ .post_probe = tpm_tis_post_probe,
+};
- tpm_write32(chip, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
- release_locality(chip, priv->locality, 1);
-}
+static const struct tpm_class_lowlevel tpm_mem = {
+ .read_bytes = tpm_mem_read_bytes,
+ .write_bytes = tpm_mem_write_bytes,
+ .read16 = tpm_mem_read16,
+ .write16 = tpm_mem_write16,
+ .read32 = tpm_mem_read32,
+ .write32 = tpm_mem_write32,
+};
static int tpm_tis_init(struct device *dev, struct tpm_info *tpm_info,
acpi_handle acpi_dev_handle)
{
- u32 vendor, intfcaps, intmask;
- u8 rid;
- int rc, probe;
- struct tpm_chip *chip;
- struct priv_data *priv;
-
- priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
- if (priv == NULL)
- return -ENOMEM;
-
- chip = tpmm_chip_alloc(dev, &tpm_tis);
- if (IS_ERR(chip))
- return PTR_ERR(chip);
-
-#ifdef CONFIG_ACPI
- chip->acpi_dev_handle = acpi_dev_handle;
-#endif
-
- priv->iobase = devm_ioremap_resource(dev, &tpm_info->res);
- if (IS_ERR(priv->iobase))
- return PTR_ERR(priv->iobase);
-
- chip->lowlevel = &tpm_mem;
-
- /* Maximum timeouts */
- chip->timeout_a = TIS_TIMEOUT_A_MAX;
- chip->timeout_b = TIS_TIMEOUT_B_MAX;
- chip->timeout_c = TIS_TIMEOUT_C_MAX;
- chip->timeout_d = TIS_TIMEOUT_D_MAX;
- priv->phy_ops = &tis_phy_ops;
+ struct tpm_tis_phy *phy;
+ int irq = -1;
- dev_set_drvdata(&chip->dev, priv);
-
- if (wait_startup(chip, 0) != 0) {
- rc = -ENODEV;
- goto out_err;
- }
-
- /* Take control of the TPM's interrupt hardware and shut it off */
- rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
- if (rc < 0)
- goto out_err;
-
- intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
- TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
- intmask &= ~TPM_GLOBAL_INT_ENABLE;
- tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
-
- if (request_locality(chip, 0) != 0) {
- rc = -ENODEV;
- goto out_err;
- }
-
- rc = tpm2_probe(chip);
- if (rc)
- goto out_err;
-
- rc = tpm_read32(chip, TPM_DID_VID(0), &vendor);
- if (rc < 0)
- goto out_err;
-
- priv->manufacturer_id = vendor;
-
- rc = tpm_read8(chip, TPM_RID(0), &rid);
- if (rc < 0)
- goto out_err;
-
- dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
- (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
- vendor >> 16, rid);
-
- if (priv->phy_ops && priv->phy_ops->post_probe) {
- rc = priv->phy_ops->post_probe(chip);
- if (rc < 0) {
- rc = -ENODEV;
- goto out_err;
- }
- }
-
- /* Figure out the capabilities */
- rc = tpm_read32(chip, TPM_INTF_CAPS(priv->locality), &intfcaps);
- if (rc < 0)
- goto out_err;
-
- dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
- intfcaps);
- if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
- dev_dbg(dev, "\tBurst Count Static\n");
- if (intfcaps & TPM_INTF_CMD_READY_INT)
- dev_dbg(dev, "\tCommand Ready Int Support\n");
- if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
- dev_dbg(dev, "\tInterrupt Edge Falling\n");
- if (intfcaps & TPM_INTF_INT_EDGE_RISING)
- dev_dbg(dev, "\tInterrupt Edge Rising\n");
- if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
- dev_dbg(dev, "\tInterrupt Level Low\n");
- if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
- dev_dbg(dev, "\tInterrupt Level High\n");
- if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
- dev_dbg(dev, "\tLocality Change Int Support\n");
- if (intfcaps & TPM_INTF_STS_VALID_INT)
- dev_dbg(dev, "\tSts Valid Int Support\n");
- if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
- dev_dbg(dev, "\tData Avail Int Support\n");
-
- /* Very early on issue a command to the TPM in polling mode to make
- * sure it works. May as well use that command to set the proper
- * timeouts for the driver.
- */
- if (tpm_get_timeouts(chip)) {
- dev_err(dev, "Could not get TPM timeouts and durations\n");
- rc = -ENODEV;
- goto out_err;
- }
-
- /* INTERRUPT Setup */
- init_waitqueue_head(&priv->read_queue);
- init_waitqueue_head(&priv->int_queue);
- if (interrupts && tpm_info->irq != -1) {
- if (tpm_info->irq) {
- tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
- tpm_info->irq);
- if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
- dev_err(&chip->dev, FW_BUG
- "TPM interrupt not working, polling instead\n");
- } else
- tpm_tis_probe_irq(chip, intmask);
- }
-
- if (chip->flags & TPM_CHIP_FLAG_TPM2) {
- rc = tpm2_do_selftest(chip);
- if (rc == TPM2_RC_INITIALIZE) {
- dev_warn(dev, "Firmware has not started TPM\n");
- rc = tpm2_startup(chip, TPM2_SU_CLEAR);
- if (!rc)
- rc = tpm2_do_selftest(chip);
- }
-
- if (rc) {
- dev_err(dev, "TPM self test failed\n");
- if (rc > 0)
- rc = -ENODEV;
- goto out_err;
- }
- } else {
- if (tpm_do_selftest(chip)) {
- dev_err(dev, "TPM self test failed\n");
- rc = -ENODEV;
- goto out_err;
- }
- }
-
- return tpm_chip_register(chip);
-out_err:
- tpm_tis_remove(chip);
- return rc;
-}
-
-#ifdef CONFIG_PM_SLEEP
-static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
-{
- struct priv_data *priv = dev_get_drvdata(&chip->dev);
- u32 intmask;
- int rc;
-
- /* reenable interrupts that device may have lost or
- BIOS/firmware may have disabled */
- rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality), priv->irq);
- if (rc < 0)
- return;
+ phy = devm_kzalloc(dev, sizeof(struct tpm_tis_phy), GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
- rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
- if (rc < 0)
- return;
+ phy->iobase = devm_ioremap_resource(dev, &tpm_info->res);
+ if (IS_ERR(phy->iobase))
+ return PTR_ERR(phy->iobase);
- intmask |= TPM_INTF_CMD_READY_INT
- | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
- | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
+ if (interrupts)
+ irq = tpm_info->irq;
- tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
+ return tpm_tis_core_init(dev, phy, irq, &tpm_tis, &tpm_mem,
+ &tis_phy_ops, acpi_dev_handle);
}
-static int tpm_tis_resume(struct device *dev)
-{
- struct tpm_chip *chip = dev_get_drvdata(dev);
- int ret;
-
- if (chip->flags & TPM_CHIP_FLAG_IRQ)
- tpm_tis_reenable_interrupts(chip);
-
- ret = tpm_pm_resume(dev);
- if (ret)
- return ret;
-
- /* TPM 1.2 requires self-test on resume. This function actually returns
- * an error code but for unknown reason it isn't handled.
- */
- if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
- tpm_do_selftest(chip);
-
- return 0;
-}
-#endif
-
static SIMPLE_DEV_PM_OPS(tpm_tis_pm, tpm_pm_suspend, tpm_tis_resume);
static int tpm_tis_pnp_init(struct pnp_dev *pnp_dev,
@@ -1258,12 +488,6 @@ static struct platform_driver tis_drv = {
},
};
-static bool force;
-#ifdef CONFIG_X86
-module_param(force, bool, 0444);
-MODULE_PARM_DESC(force, "Force device probe rather than using ACPI entry");
-#endif
-
static int tpm_tis_force_device(void)
{
struct platform_device *pdev;
diff --git a/drivers/char/tpm/tpm_tis_core.c b/drivers/char/tpm/tpm_tis_core.c
new file mode 100644
index 0000000..803592e
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis_core.c
@@ -0,0 +1,782 @@
+/*
+ * Copyright (C) 2005, 2006 IBM Corporation
+ * Copyright (C) 2014, 2015 Intel Corporation
+ *
+ * Authors:
+ * Leendert van Doorn <leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org>
+ * Kylene Hall <kjhall-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.2, revision 1.0.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/pnp.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/acpi.h>
+#include <linux/freezer.h>
+#include "tpm.h"
+#include "tpm_tis_core.h"
+
+/* Before we attempt to access the TPM we must see that the valid bit is set.
+ * The specification says that this bit is 0 at reset and remains 0 until the
+ * 'TPM has gone through its self test and initialization and has established
+ * correct values in the other bits.'
+ */
+static int wait_startup(struct tpm_chip *chip, int l)
+{
+ unsigned long stop = jiffies + chip->timeout_a;
+
+ do {
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(chip, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
+
+ if (access & TPM_ACCESS_VALID)
+ return 0;
+ msleep(TPM_TIMEOUT);
+ } while (time_before(jiffies, stop));
+ return -1;
+}
+
+static int check_locality(struct tpm_chip *chip, int l)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(chip, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return rc;
+
+ if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
+ (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
+ return priv->locality = l;
+
+ return -1;
+}
+
+void release_locality(struct tpm_chip *chip, int l, int force)
+{
+ int rc;
+ u8 access;
+
+ rc = tpm_read8(chip, TPM_ACCESS(l), &access);
+ if (rc < 0)
+ return;
+
+ if (force || (access &
+ (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
+ (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
+ tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
+
+}
+EXPORT_SYMBOL(release_locality);
+
+static int request_locality(struct tpm_chip *chip, int l)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ unsigned long stop, timeout;
+ long rc;
+
+ if (check_locality(chip, l) >= 0)
+ return l;
+
+ rc = tpm_write8(chip, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
+ if (rc < 0)
+ return rc;
+
+ stop = jiffies + chip->timeout_a;
+
+ if (chip->flags & TPM_CHIP_FLAG_IRQ) {
+again:
+ timeout = stop - jiffies;
+ if ((long)timeout <= 0)
+ return -1;
+ rc = wait_event_interruptible_timeout(priv->int_queue,
+ (check_locality
+ (chip, l) >= 0),
+ timeout);
+ if (rc > 0)
+ return l;
+ if (rc == -ERESTARTSYS && freezing(current)) {
+ clear_thread_flag(TIF_SIGPENDING);
+ goto again;
+ }
+ } else {
+ /* wait for burstcount */
+ do {
+ if (check_locality(chip, l) >= 0)
+ return l;
+ msleep(TPM_TIMEOUT);
+ } while (time_before(jiffies, stop));
+ }
+ return -1;
+}
+
+u8 tpm_tis_status(struct tpm_chip *chip)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u8 status;
+
+ rc = tpm_read8(chip, TPM_STS(priv->locality), &status);
+ if (rc < 0)
+ return 0;
+
+ return status;
+}
+EXPORT_SYMBOL(tpm_tis_status);
+
+void tpm_tis_ready(struct tpm_chip *chip)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ /* this causes the current command to be aborted */
+ tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
+}
+EXPORT_SYMBOL(tpm_tis_ready);
+
+static int get_burstcount(struct tpm_chip *chip)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ unsigned long stop;
+ int burstcnt, rc;
+ u8 value;
+
+ /* wait for burstcount */
+ /* which timeout value, spec has 2 answers (c & d) */
+ stop = jiffies + chip->timeout_d;
+ do {
+ rc = tpm_read8(chip, TPM_STS(priv->locality) + 1, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt = value;
+ rc = tpm_read8(chip, TPM_STS(priv->locality) + 2, &value);
+ if (rc < 0)
+ return rc;
+
+ burstcnt += value << 8;
+ if (burstcnt)
+ return burstcnt;
+ msleep(TPM_TIMEOUT);
+ } while (time_before(jiffies, stop));
+ return -EBUSY;
+}
+
+static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int size = 0, burstcnt, rc;
+
+ while (size < count &&
+ wait_for_tpm_stat(chip,
+ TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ chip->timeout_c,
+ &priv->read_queue, true) == 0) {
+ burstcnt = min_t(int, get_burstcount(chip), count - size);
+
+ rc = tpm_read_bytes(chip, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + size);
+ if (rc < 0)
+ return rc;
+
+ size += burstcnt;
+ }
+ return size;
+}
+
+int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int size = 0;
+ int expected, status;
+
+ if (count < TPM_HEADER_SIZE) {
+ size = -EIO;
+ goto out;
+ }
+
+ size = recv_data(chip, buf, TPM_HEADER_SIZE);
+ /* read first 10 bytes, including tag, paramsize, and result */
+ if (size < TPM_HEADER_SIZE) {
+ dev_err(&chip->dev, "Unable to read header\n");
+ goto out;
+ }
+
+ expected = be32_to_cpu(*(__be32 *) (buf + 2));
+ if (expected > count) {
+ size = -EIO;
+ goto out;
+ }
+
+ size += recv_data(chip, &buf[TPM_HEADER_SIZE],
+ expected - TPM_HEADER_SIZE);
+ if (size < expected) {
+ dev_err(&chip->dev, "Unable to read remainder of result\n");
+ size = -ETIME;
+ goto out;
+ }
+
+ wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
+ &priv->int_queue, false);
+ status = tpm_tis_status(chip);
+ if (status & TPM_STS_DATA_AVAIL) { /* retry? */
+ dev_err(&chip->dev, "Error left over data\n");
+ size = -EIO;
+ goto out;
+ }
+
+out:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+ return size;
+}
+EXPORT_SYMBOL(tpm_tis_recv);
+
+/*
+ * If interrupts are used (signaled by an irq set in the vendor structure)
+ * tpm.c can skip polling for the data to be available as the interrupt is
+ * waited for here
+ */
+int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int rc, status, burstcnt;
+ size_t count = 0;
+
+ if (request_locality(chip, 0) < 0)
+ return -EBUSY;
+
+ status = tpm_tis_status(chip);
+ if ((status & TPM_STS_COMMAND_READY) == 0) {
+ tpm_tis_ready(chip);
+ if (wait_for_tpm_stat
+ (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
+ &priv->int_queue, false) < 0) {
+ rc = -ETIME;
+ goto out_err;
+ }
+ }
+
+ while (count < len - 1) {
+ burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
+ rc = tpm_write_bytes(chip, TPM_DATA_FIFO(priv->locality),
+ burstcnt, buf + count);
+ if (rc < 0)
+ goto out_err;
+
+ count += burstcnt;
+
+ wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
+ &priv->int_queue, false);
+ status = tpm_tis_status(chip);
+ if ((status & priv->phy_ops->data_expect_mask) !=
+ priv->phy_ops->data_expect_val) {
+ rc = -EIO;
+ goto out_err;
+ }
+ }
+
+ /* write last byte */
+ rc = tpm_write8(chip, TPM_DATA_FIFO(priv->locality), buf[count]);
+ if (rc < 0)
+ goto out_err;
+
+ wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
+ &priv->int_queue, false);
+ status = tpm_tis_status(chip);
+ if ((status & priv->phy_ops->data_expect_mask) ==
+ priv->phy_ops->data_expect_mask) {
+ rc = -EIO;
+ goto out_err;
+ }
+
+ return 0;
+
+out_err:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+ return rc;
+}
+EXPORT_SYMBOL(tpm_tis_send_data);
+
+static void disable_interrupts(struct tpm_chip *chip)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u32 intmask;
+ int rc;
+
+ rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ intmask = 0;
+
+ intmask &= ~TPM_GLOBAL_INT_ENABLE;
+ rc = tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
+
+ devm_free_irq(&chip->dev, priv->irq, chip);
+ priv->irq = 0;
+ chip->flags &= ~TPM_CHIP_FLAG_IRQ;
+}
+
+/*
+ * If interrupts are used (signaled by an irq set in the vendor structure)
+ * tpm.c can skip polling for the data to be available as the interrupt is
+ * waited for here
+ */
+static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ int rc;
+ u32 ordinal;
+ unsigned long dur;
+
+ rc = tpm_tis_send_data(chip, buf, len);
+ if (rc < 0)
+ return rc;
+
+ /* go and do it */
+ rc = tpm_write8(chip, TPM_STS(priv->locality), TPM_STS_GO);
+ if (rc < 0)
+ goto out_err;
+
+ if (chip->flags & TPM_CHIP_FLAG_IRQ) {
+ ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
+
+ if (chip->flags & TPM_CHIP_FLAG_TPM2)
+ dur = tpm2_calc_ordinal_duration(chip, ordinal);
+ else
+ dur = tpm_calc_ordinal_duration(chip, ordinal);
+
+ if (wait_for_tpm_stat
+ (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
+ &priv->read_queue, false) < 0) {
+ rc = -ETIME;
+ goto out_err;
+ }
+ }
+ return len;
+out_err:
+ tpm_tis_ready(chip);
+ release_locality(chip, priv->locality, 0);
+ return rc;
+}
+
+int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
+{
+ int rc, irq;
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
+ return tpm_tis_send_main(chip, buf, len);
+
+ /* Verify receipt of the expected IRQ */
+ irq = priv->irq;
+ priv->irq = 0;
+ chip->flags &= ~TPM_CHIP_FLAG_IRQ;
+ rc = tpm_tis_send_main(chip, buf, len);
+ priv->irq = irq;
+ chip->flags |= TPM_CHIP_FLAG_IRQ;
+ if (!priv->irq_tested)
+ msleep(1);
+ if (!priv->irq_tested)
+ disable_interrupts(chip);
+ priv->irq_tested = true;
+ return rc;
+}
+EXPORT_SYMBOL(tpm_tis_send);
+
+bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+
+ switch (priv->manufacturer_id) {
+ case TPM_VID_WINBOND:
+ return ((status == TPM_STS_VALID) ||
+ (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
+ case TPM_VID_STM:
+ return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
+ default:
+ return (status == TPM_STS_COMMAND_READY);
+ }
+}
+EXPORT_SYMBOL(tpm_tis_req_canceled);
+
+static irqreturn_t tis_int_handler(int dummy, void *dev_id)
+{
+ struct tpm_chip *chip = dev_id;
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u32 interrupt;
+ int i, rc;
+
+ rc = tpm_read32(chip, TPM_INT_STATUS(priv->locality), &interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
+
+ if (interrupt == 0)
+ return IRQ_NONE;
+
+ priv->irq_tested = true;
+ if (interrupt & TPM_INTF_DATA_AVAIL_INT)
+ wake_up_interruptible(&priv->read_queue);
+ if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
+ for (i = 0; i < 5; i++)
+ if (check_locality(chip, i) >= 0)
+ break;
+ if (interrupt &
+ (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
+ TPM_INTF_CMD_READY_INT))
+ wake_up_interruptible(&priv->int_queue);
+
+ /* Clear interrupts handled with TPM_EOI */
+ rc = tpm_write32(chip, TPM_INT_STATUS(priv->locality), interrupt);
+ if (rc < 0)
+ return IRQ_NONE;
+
+ tpm_read32(chip, TPM_INT_STATUS(priv->locality), &interrupt);
+ return IRQ_HANDLED;
+}
+
+/* Register the IRQ and issue a command that will cause an interrupt. If an
+ * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
+ * everything and leave in polling mode. Returns 0 on success.
+ */
+static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
+ int flags, int irq)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u8 original_int_vec;
+ int rc;
+ u32 int_status;
+
+ if (devm_request_irq(&chip->dev, irq, tis_int_handler, flags,
+ dev_name(&chip->dev), chip) != 0) {
+ dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
+ irq);
+ return -1;
+ }
+ priv->irq = irq;
+
+ rc = tpm_read8(chip, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality), irq);
+ if (rc < 0)
+ return rc;
+
+ rc = tpm_read32(chip, TPM_INT_STATUS(priv->locality), &int_status);
+ if (rc < 0)
+ return rc;
+
+ /* Clear all existing */
+ rc = tpm_write32(chip, TPM_INT_STATUS(priv->locality), int_status);
+ if (rc < 0)
+ return rc;
+
+ /* Turn on */
+ rc = tpm_write32(chip, TPM_INT_ENABLE(priv->locality),
+ intmask | TPM_GLOBAL_INT_ENABLE);
+ if (rc < 0)
+ return rc;
+
+ priv->irq_tested = false;
+
+ /* Generate an interrupt by having the core call through to
+ * tpm_tis_send
+ */
+ if (chip->flags & TPM_CHIP_FLAG_TPM2)
+ tpm2_gen_interrupt(chip);
+ else
+ tpm_gen_interrupt(chip);
+
+ /* tpm_tis_send will either confirm the interrupt is working or it
+ * will call disable_irq which undoes all of the above.
+ */
+ if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
+ rc = tpm_write8(chip, original_int_vec,
+ TPM_INT_VECTOR(priv->locality));
+ if (rc < 0)
+ return rc;
+
+ return 1;
+ }
+
+ return 0;
+}
+
+/* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
+ * do not have ACPI/etc. We typically expect the interrupt to be declared if
+ * present.
+ */
+static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u8 original_int_vec;
+ int i, rc;
+
+ rc = tpm_read8(chip, TPM_INT_VECTOR(priv->locality), &original_int_vec);
+ if (rc < 0)
+ return;
+
+ if (!original_int_vec) {
+ if (IS_ENABLED(CONFIG_X86))
+ for (i = 3; i <= 15; i++)
+ if (!tpm_tis_probe_irq_single(chip, intmask, 0,
+ i))
+ return;
+ } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
+ original_int_vec))
+ return;
+}
+
+void tpm_tis_remove(struct tpm_chip *chip)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u32 reg = TPM_INT_ENABLE(priv->locality);
+ u32 interrupt;
+ int rc;
+
+ if (chip->flags & TPM_CHIP_FLAG_TPM2)
+ tpm2_shutdown(chip, TPM2_SU_CLEAR);
+
+ rc = tpm_read32(chip, reg, &interrupt);
+ if (rc < 0)
+ interrupt = 0;
+
+ tpm_write32(chip, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
+ release_locality(chip, priv->locality, 1);
+}
+EXPORT_SYMBOL(tpm_tis_remove);
+
+int tpm_tis_core_init(struct device *dev, void *phy_id, int irq,
+ const struct tpm_class_ops *tis_ops,
+ const struct tpm_class_lowlevel *lowlevel,
+ struct tpm_tis_phy_ops *tis_phy_ops,
+ acpi_handle acpi_dev_handle)
+{
+ u32 vendor, intfcaps, intmask;
+ u8 rid;
+ int rc;
+ struct tpm_chip *chip;
+ struct priv_data *priv;
+
+ priv = devm_kzalloc(dev, sizeof(struct priv_data), GFP_KERNEL);
+ if (priv == NULL)
+ return -ENOMEM;
+
+ chip = tpmm_chip_alloc(dev, tis_ops);
+ if (IS_ERR(chip))
+ return PTR_ERR(chip);
+
+#ifdef CONFIG_ACPI
+ chip->acpi_dev_handle = acpi_dev_handle;
+#endif
+
+ chip->lowlevel = lowlevel;
+
+ /* Maximum timeouts */
+ chip->timeout_a = TIS_TIMEOUT_A_MAX;
+ chip->timeout_b = TIS_TIMEOUT_B_MAX;
+ chip->timeout_c = TIS_TIMEOUT_C_MAX;
+ chip->timeout_d = TIS_TIMEOUT_D_MAX;
+ priv->phy_ops = tis_phy_ops;
+ priv->phy_id = phy_id;
+
+ dev_set_drvdata(&chip->dev, priv);
+
+ if (wait_startup(chip, 0) != 0) {
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ /* Take control of the TPM's interrupt hardware and shut it off */
+ rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ goto out_err;
+
+ intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
+ TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
+ intmask &= ~TPM_GLOBAL_INT_ENABLE;
+ tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
+
+ if (request_locality(chip, 0) != 0) {
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ rc = tpm2_probe(chip);
+ if (rc)
+ goto out_err;
+
+ rc = tpm_read32(chip, TPM_DID_VID(0), &vendor);
+ if (rc < 0)
+ goto out_err;
+
+ priv->manufacturer_id = vendor;
+
+ rc = tpm_read8(chip, TPM_RID(0), &rid);
+ if (rc < 0)
+ goto out_err;
+
+ dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
+ (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
+ vendor >> 16, rid);
+
+ if (priv->phy_ops && priv->phy_ops->post_probe) {
+ rc = priv->phy_ops->post_probe(chip);
+ if (rc < 0) {
+ rc = -ENODEV;
+ goto out_err;
+ }
+ }
+
+ /* Figure out the capabilities */
+ rc = tpm_read32(chip, TPM_INTF_CAPS(priv->locality), &intfcaps);
+ if (rc < 0)
+ goto out_err;
+
+ dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
+ intfcaps);
+ if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
+ dev_dbg(dev, "\tBurst Count Static\n");
+ if (intfcaps & TPM_INTF_CMD_READY_INT)
+ dev_dbg(dev, "\tCommand Ready Int Support\n");
+ if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
+ dev_dbg(dev, "\tInterrupt Edge Falling\n");
+ if (intfcaps & TPM_INTF_INT_EDGE_RISING)
+ dev_dbg(dev, "\tInterrupt Edge Rising\n");
+ if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
+ dev_dbg(dev, "\tInterrupt Level Low\n");
+ if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
+ dev_dbg(dev, "\tInterrupt Level High\n");
+ if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
+ dev_dbg(dev, "\tLocality Change Int Support\n");
+ if (intfcaps & TPM_INTF_STS_VALID_INT)
+ dev_dbg(dev, "\tSts Valid Int Support\n");
+ if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
+ dev_dbg(dev, "\tData Avail Int Support\n");
+
+ /* Very early on issue a command to the TPM in polling mode to make
+ * sure it works. May as well use that command to set the proper
+ * timeouts for the driver.
+ */
+ if (tpm_get_timeouts(chip)) {
+ dev_err(dev, "Could not get TPM timeouts and durations\n");
+ rc = -ENODEV;
+ goto out_err;
+ }
+
+ /* INTERRUPT Setup */
+ init_waitqueue_head(&priv->read_queue);
+ init_waitqueue_head(&priv->int_queue);
+ if (irq != -1) {
+ if (irq) {
+ tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
+ irq);
+ if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
+ dev_err(&chip->dev, FW_BUG
+ "TPM interrupt not working, polling instead\n");
+ } else
+ tpm_tis_probe_irq(chip, intmask);
+ }
+
+ if (chip->flags & TPM_CHIP_FLAG_TPM2) {
+ rc = tpm2_do_selftest(chip);
+ if (rc == TPM2_RC_INITIALIZE) {
+ dev_warn(dev, "Firmware has not started TPM\n");
+ rc = tpm2_startup(chip, TPM2_SU_CLEAR);
+ if (!rc)
+ rc = tpm2_do_selftest(chip);
+ }
+
+ if (rc) {
+ dev_err(dev, "TPM self test failed\n");
+ if (rc > 0)
+ rc = -ENODEV;
+ goto out_err;
+ }
+ } else {
+ if (tpm_do_selftest(chip)) {
+ dev_err(dev, "TPM self test failed\n");
+ rc = -ENODEV;
+ goto out_err;
+ }
+ }
+
+ return tpm_chip_register(chip);
+out_err:
+ tpm_tis_remove(chip);
+ return rc;
+}
+EXPORT_SYMBOL(tpm_tis_core_init);
+
+#ifdef CONFIG_PM_SLEEP
+static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ u32 intmask;
+ int rc;
+
+ /* reenable interrupts that device may have lost or
+ * BIOS/firmware may have disabled
+ */
+ rc = tpm_write8(chip, TPM_INT_VECTOR(priv->locality), priv->irq);
+ if (rc < 0)
+ return;
+
+ rc = tpm_read32(chip, TPM_INT_ENABLE(priv->locality), &intmask);
+ if (rc < 0)
+ return;
+
+ intmask |= TPM_INTF_CMD_READY_INT
+ | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
+ | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
+
+ tpm_write32(chip, TPM_INT_ENABLE(priv->locality), intmask);
+}
+
+int tpm_tis_resume(struct device *dev)
+{
+ struct tpm_chip *chip = dev_get_drvdata(dev);
+ int ret;
+
+ if (chip->flags & TPM_CHIP_FLAG_IRQ)
+ tpm_tis_reenable_interrupts(chip);
+
+ ret = tpm_pm_resume(dev);
+ if (ret)
+ return ret;
+
+ /* TPM 1.2 requires self-test on resume. This function actually returns
+ * an error code but for unknown reason it isn't handled.
+ */
+ if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
+ tpm_do_selftest(chip);
+
+ return 0;
+}
+EXPORT_SYMBOL(tpm_tis_resume);
+#endif
+
+MODULE_AUTHOR("Leendert van Doorn (leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org)");
+MODULE_DESCRIPTION("TPM Driver");
+MODULE_VERSION("2.0");
+MODULE_LICENSE("GPL");
diff --git a/drivers/char/tpm/tpm_tis_core.h b/drivers/char/tpm/tpm_tis_core.h
new file mode 100644
index 0000000..aa6b698
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis_core.h
@@ -0,0 +1,122 @@
+/*
+ * Copyright (C) 2005, 2006 IBM Corporation
+ * Copyright (C) 2014, 2015 Intel Corporation
+ *
+ * Authors:
+ * Leendert van Doorn <leendert-aZOuKsOsJu3MbYB6QlFGEg@public.gmane.org>
+ * Kylene Hall <kjhall-r/Jw6+rmf7HQT0dZR+AlfA@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.2, revision 1.0.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#ifndef __TPM_TIS_CORE_H__
+#define __TPM_TIS_CORE_H__
+
+#include "tpm.h"
+
+enum tis_access {
+ TPM_ACCESS_VALID = 0x80,
+ TPM_ACCESS_ACTIVE_LOCALITY = 0x20,
+ TPM_ACCESS_REQUEST_PENDING = 0x04,
+ TPM_ACCESS_REQUEST_USE = 0x02,
+};
+
+enum tis_status {
+ TPM_STS_VALID = 0x80,
+ TPM_STS_COMMAND_READY = 0x40,
+ TPM_STS_GO = 0x20,
+ TPM_STS_DATA_AVAIL = 0x10,
+ TPM_STS_DATA_EXPECT = 0x08,
+};
+
+enum tis_int_flags {
+ TPM_GLOBAL_INT_ENABLE = 0x80000000,
+ TPM_INTF_BURST_COUNT_STATIC = 0x100,
+ TPM_INTF_CMD_READY_INT = 0x080,
+ TPM_INTF_INT_EDGE_FALLING = 0x040,
+ TPM_INTF_INT_EDGE_RISING = 0x020,
+ TPM_INTF_INT_LEVEL_LOW = 0x010,
+ TPM_INTF_INT_LEVEL_HIGH = 0x008,
+ TPM_INTF_LOCALITY_CHANGE_INT = 0x004,
+ TPM_INTF_STS_VALID_INT = 0x002,
+ TPM_INTF_DATA_AVAIL_INT = 0x001,
+};
+
+enum tis_defaults {
+ TIS_MEM_LEN = 0x5000,
+ TIS_SHORT_TIMEOUT = 750, /* ms */
+ TIS_LONG_TIMEOUT = 2000, /* 2 sec */
+};
+
+/* Some timeout values are needed before it is known whether the chip is
+ * TPM 1.0 or TPM 2.0.
+ */
+#define TIS_TIMEOUT_A_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_A)
+#define TIS_TIMEOUT_B_MAX max(TIS_LONG_TIMEOUT, TPM2_TIMEOUT_B)
+#define TIS_TIMEOUT_C_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_C)
+#define TIS_TIMEOUT_D_MAX max(TIS_SHORT_TIMEOUT, TPM2_TIMEOUT_D)
+
+#define TPM_ACCESS(l) (0x0000 | ((l) << 12))
+#define TPM_INT_ENABLE(l) (0x0008 | ((l) << 12))
+#define TPM_INT_VECTOR(l) (0x000C | ((l) << 12))
+#define TPM_INT_STATUS(l) (0x0010 | ((l) << 12))
+#define TPM_INTF_CAPS(l) (0x0014 | ((l) << 12))
+#define TPM_STS(l) (0x0018 | ((l) << 12))
+#define TPM_STS3(l) (0x001b | ((l) << 12))
+#define TPM_DATA_FIFO(l) (0x0024 | ((l) << 12))
+
+#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
+#define TPM_RID(l) (0x0F04 | ((l) << 12))
+
+struct tpm_tis_phy_ops {
+ u8 data_expect_mask;
+ u8 data_expect_val;
+ int (*post_probe)(struct tpm_chip *chip);
+};
+
+struct priv_data {
+ u16 manufacturer_id;
+ int locality;
+ int irq;
+ bool irq_tested;
+ wait_queue_head_t int_queue;
+ wait_queue_head_t read_queue;
+ struct tpm_tis_phy_ops *phy_ops;
+ void *phy_id;
+};
+
+struct tis_vendor_timeout_override {
+ u32 did_vid;
+ unsigned long timeout_us[4];
+};
+
+u8 tpm_tis_status(struct tpm_chip *chip);
+void tpm_tis_ready(struct tpm_chip *chip);
+void release_locality(struct tpm_chip *chip, int l, int force);
+int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count);
+int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len);
+int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len);
+bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status);
+void tpm_tis_remove(struct tpm_chip *chip);
+int tpm_tis_core_init(struct device *dev, void *phy_id, int irq,
+ const struct tpm_class_ops *tis_ops,
+ const struct tpm_class_lowlevel *lowlevel,
+ struct tpm_tis_phy_ops *tis_phy_ops,
+ acpi_handle acpi_dev_handle);
+
+#ifdef CONFIG_PM_SLEEP
+int tpm_tis_resume(struct device *dev);
+#endif
+
+#endif
--
2.1.4
------------------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 21+ messages in thread* [PATCH 10/10] tpm/tpm_tis_spi: Add support for spi phy
[not found] ` <1460323386-16892-1-git-send-email-christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
` (8 preceding siblings ...)
2016-04-10 21:23 ` [PATCH 09/10] tpm/tpm_tis: Split tpm_tis driver into a core and TCG TIS compliant phy Christophe Ricard
@ 2016-04-10 21:23 ` Christophe Ricard
9 siblings, 0 replies; 21+ messages in thread
From: Christophe Ricard @ 2016-04-10 21:23 UTC (permalink / raw)
To: jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA
Cc: jean-luc.blanc-qxv4g6HH51o, ashley-fm2HMyfA2y6tG0bUXCXiUA,
tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f,
christophe-h.ricard-qxv4g6HH51o, Peter Huewe,
benoit.houyere-qxv4g6HH51o
Spi protocol standardized by the TCG is now supported by most of TPM
vendors.
It supports SPI Bit Protocol as describe in the TCG PTP
specification (chapter 6.4.6 SPI Bit Protocol).
Irq mode is not supported.
Signed-off-by: Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Alexander Steffen <Alexander.Steffen-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
Signed-off-by: Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
---
.../bindings/security/tpm/tpm_tis_spi.txt | 28 +++
drivers/char/tpm/Kconfig | 12 +
drivers/char/tpm/Makefile | 1 +
drivers/char/tpm/tpm_tis_spi.c | 259 +++++++++++++++++++++
4 files changed, 300 insertions(+)
create mode 100644 Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt
create mode 100644 drivers/char/tpm/tpm_tis_spi.c
diff --git a/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt b/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt
new file mode 100644
index 0000000..e0464b0
--- /dev/null
+++ b/Documentation/devicetree/bindings/security/tpm/tpm_tis_spi.txt
@@ -0,0 +1,28 @@
+Required properties:
+- compatible: Should be "st,st33htpm-spi" or "infineon,slb9670" or "tcg,tpm_tis-spi"
+- spi-max-frequency: Maximum SPI frequency (depends on TPMs).
+
+Optional TPM_TIS SPI Properties:
+- interrupt-parent: phandle for the interrupt gpio controller
+- interrupts: GPIO interrupt to which the chip is connected
+
+Optional SoC Specific Properties:
+- pinctrl-names: Contains only one value - "default".
+- pintctrl-0: Specifies the pin control groups used for this controller.
+
+Example (for ARM-based BeagleBoard xM with TPM_TIS on SPI4):
+
+&mcspi4 {
+
+ status = "okay";
+
+ tpm_tis@0 {
+
+ compatible = "tcg,tpm_tis-spi";
+
+ spi-max-frequency = <10000000>;
+
+ interrupt-parent = <&gpio5>;
+ interrupts = <7 IRQ_TYPE_LEVEL_HIGH>;
+ };
+};
diff --git a/drivers/char/tpm/Kconfig b/drivers/char/tpm/Kconfig
index b217308..a8ab570 100644
--- a/drivers/char/tpm/Kconfig
+++ b/drivers/char/tpm/Kconfig
@@ -41,6 +41,18 @@ config TCG_TIS
within Linux. To compile this driver as a module, choose M here;
the module will be called tpm_tis.
+config TCG_TIS_SPI
+ tristate "TPM Interface Specification 1.3 Interface / TPM 2.0 FIFO Interface - (SPI)"
+ depends on SPI
+ select TCG_TIS_CORE
+ ---help---
+ If you have a TPM security chip which is connected to a regular,
+ non-tcg SPI master (i.e. most embedded platforms) that is compliant with the
+ TCG TIS 1.3 TPM specification (TPM1.2) or the TCG PTP FIFO
+ specification (TPM2.0) say Yes and it will be accessible from
+ within Linux. To compile this driver as a module, choose M here;
+ the module will be called tpm_tis_spi.
+
config TCG_TIS_I2C_ATMEL
tristate "TPM Interface Specification 1.2 Interface (I2C - Atmel)"
depends on I2C
diff --git a/drivers/char/tpm/Makefile b/drivers/char/tpm/Makefile
index c6a4cea..69508ef 100644
--- a/drivers/char/tpm/Makefile
+++ b/drivers/char/tpm/Makefile
@@ -16,6 +16,7 @@ obj-$(CONFIG_TCG_TIS) += tpm_tis.o
obj-$(CONFIG_TCG_TIS_I2C_ATMEL) += tpm_i2c_atmel.o
obj-$(CONFIG_TCG_TIS_I2C_INFINEON) += tpm_i2c_infineon.o
obj-$(CONFIG_TCG_TIS_I2C_NUVOTON) += tpm_i2c_nuvoton.o
+obj-$(CONFIG_TCG_TIS_SPI) += tpm_tis_spi.o
obj-$(CONFIG_TCG_NSC) += tpm_nsc.o
obj-$(CONFIG_TCG_ATMEL) += tpm_atmel.o
obj-$(CONFIG_TCG_INFINEON) += tpm_infineon.o
diff --git a/drivers/char/tpm/tpm_tis_spi.c b/drivers/char/tpm/tpm_tis_spi.c
new file mode 100644
index 0000000..0696ad5
--- /dev/null
+++ b/drivers/char/tpm/tpm_tis_spi.c
@@ -0,0 +1,259 @@
+/*
+ * Copyright (C) 2015 Infineon Technologies AG
+ * Copyright (C) 2016 STMicroelectronics SAS
+ *
+ * Authors:
+ * Peter Huewe <peter.huewe-d0qZbvYSIPpWk0Htik3J/w@public.gmane.org>
+ * Christophe Ricard <christophe-h.ricard-qxv4g6HH51o@public.gmane.org>
+ *
+ * Maintained by: <tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org>
+ *
+ * Device driver for TCG/TCPA TPM (trusted platform module).
+ * Specifications at www.trustedcomputinggroup.org
+ *
+ * This device driver implements the TPM interface as defined in
+ * the TCG TPM Interface Spec version 1.3, revision 27 via _raw/native
+ * SPI access_.
+ *
+ * It is based on the original tpm_tis device driver from Leendert van
+ * Dorn and Kyleen Hall and Jarko Sakkinnen.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation, version 2 of the
+ * License.
+ */
+
+#include <linux/init.h>
+#include <linux/module.h>
+#include <linux/moduleparam.h>
+#include <linux/slab.h>
+#include <linux/interrupt.h>
+#include <linux/wait.h>
+#include <linux/acpi.h>
+#include <linux/freezer.h>
+
+#include <linux/module.h>
+#include <linux/spi/spi.h>
+#include <linux/gpio.h>
+#include <linux/of_irq.h>
+#include <linux/of_gpio.h>
+#include <linux/tpm.h>
+#include "tpm.h"
+#include "tpm_tis_core.h"
+
+#define MAX_SPI_FRAMESIZE 64
+
+struct tpm_tis_spi_phy {
+ struct spi_device *spi_device;
+
+ u8 tx_buf[MAX_SPI_FRAMESIZE + 4];
+ u8 rx_buf[MAX_SPI_FRAMESIZE + 4];
+};
+
+static int tpm_tis_spi_read_bytes(struct tpm_chip *chip, u32 addr,
+ u16 len, u8 *result)
+{
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_spi_phy *phy = priv->phy_id;
+ int ret;
+ struct spi_message m;
+ struct spi_transfer spi_xfer = {
+ .tx_buf = phy->tx_buf,
+ .rx_buf = phy->rx_buf,
+ .len = 4,
+ };
+
+ if (len > MAX_SPI_FRAMESIZE)
+ return -ENOMEM;
+
+ phy->tx_buf[0] = 0x80 | (len - 1);
+ phy->tx_buf[1] = 0xd4;
+ phy->tx_buf[2] = (addr >> 8) & 0xFF;
+ phy->tx_buf[3] = addr & 0xFF;
+
+ spi_xfer.cs_change = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+
+ spi_bus_lock(phy->spi_device->master);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+
+ memset(phy->tx_buf, 0, len);
+
+ /* According to TCG PTP specification, if there is no TPM present at
+ * all, then the design has a weak pull-up on MISO. If a TPM is not
+ * present, a pull-up on MISO means that the SB controller sees a 1,
+ * and will latch in 0xFF on the read.
+ */
+ for ( ; (phy->rx_buf[0] & 0x01) == 0 ; ) {
+ spi_xfer.len = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+ }
+
+ spi_xfer.cs_change = 0;
+ spi_xfer.len = len;
+ spi_xfer.rx_buf = result;
+
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+
+exit:
+ spi_bus_unlock(phy->spi_device->master);
+ return ret;
+}
+
+static int tpm_tis_spi_write_bytes(struct tpm_chip *chip, u32 addr,
+ u16 len, u8 *value)
+{
+ int ret;
+ struct priv_data *priv = dev_get_drvdata(&chip->dev);
+ struct tpm_tis_spi_phy *phy = priv->phy_id;
+ struct spi_message m;
+ struct spi_transfer spi_xfer = {
+ .tx_buf = phy->tx_buf,
+ .rx_buf = phy->rx_buf,
+ .len = 4,
+ };
+
+ if (len > MAX_SPI_FRAMESIZE)
+ return -ENOMEM;
+
+ phy->tx_buf[0] = len - 1;
+ phy->tx_buf[1] = 0xd4;
+ phy->tx_buf[2] = (addr >> 8) & 0xFF;
+ phy->tx_buf[3] = addr & 0xFF;
+
+ spi_xfer.cs_change = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+
+ spi_bus_lock(phy->spi_device->master);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+
+ memset(phy->tx_buf, 0, len);
+
+ /* According to TCG PTP specification, if there is no TPM present at
+ * all, then the design has a weak pull-up on MISO. If a TPM is not
+ * present, a pull-up on MISO means that the SB controller sees a 1,
+ * and will latch in 0xFF on the read.
+ */
+ for ( ; (phy->rx_buf[0] & 0x01) == 0 ; ) {
+ spi_xfer.len = 1;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+ if (ret < 0)
+ goto exit;
+ }
+
+ spi_xfer.len = len;
+ spi_xfer.tx_buf = value;
+ spi_xfer.cs_change = 0;
+ spi_xfer.tx_buf = value;
+ spi_message_init(&m);
+ spi_message_add_tail(&spi_xfer, &m);
+ ret = spi_sync_locked(phy->spi_device, &m);
+
+exit:
+ spi_bus_unlock(phy->spi_device->master);
+ return ret;
+}
+
+static const struct tpm_class_ops tpm_tis = {
+ .status = tpm_tis_status,
+ .recv = tpm_tis_recv,
+ .send = tpm_tis_send,
+ .cancel = tpm_tis_ready,
+ .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
+ .req_canceled = tpm_tis_req_canceled,
+};
+
+static struct tpm_tis_phy_ops tis_phy_ops = {
+ .data_expect_mask = TPM_STS_DATA_EXPECT,
+ .data_expect_val = TPM_STS_DATA_EXPECT,
+};
+
+static const struct tpm_class_lowlevel tpm_spi_lowlevel = {
+ .read_bytes = tpm_tis_spi_read_bytes,
+ .write_bytes = tpm_tis_spi_write_bytes,
+};
+
+static SIMPLE_DEV_PM_OPS(tpm_tis_spi_pm, tpm_pm_suspend, tpm_tis_resume);
+
+static int tpm_tis_spi_probe(struct spi_device *dev)
+{
+ struct tpm_tis_spi_phy *phy;
+
+ /* Check SPI platform functionnalities */
+ if (!dev) {
+ pr_err("%s: dev is NULL. Device is not accessible.\n",
+ __func__);
+ return -ENODEV;
+ }
+
+ phy = devm_kzalloc(&dev->dev, sizeof(struct tpm_tis_spi_phy),
+ GFP_KERNEL);
+ if (!phy)
+ return -ENOMEM;
+
+ phy->spi_device = dev;
+
+ return tpm_tis_core_init(&dev->dev, phy, -1, &tpm_tis,
+ &tpm_spi_lowlevel, &tis_phy_ops, NULL);
+}
+
+static int tpm_tis_spi_remove(struct spi_device *dev)
+{
+ struct tpm_chip *chip = spi_get_drvdata(dev);
+
+ tpm_chip_unregister(chip);
+ return 0;
+}
+
+static const struct spi_device_id tpm_tis_spi_id[] = {
+ {"tpm_tis_spi", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(spi, tpm_tis_spi_id);
+
+static const struct of_device_id of_tis_spi_match[] = {
+ { .compatible = "st,st33htpm-spi", },
+ { .compatible = "infineon,slb9670", },
+ { .compatible = "tcg,tpm_tis-spi", },
+ {}
+};
+MODULE_DEVICE_TABLE(of, of_tis_spi_match);
+
+static const struct acpi_device_id acpi_tis_spi_match[] = {
+ {"SMO0768", 0},
+ {}
+};
+MODULE_DEVICE_TABLE(acpi, acpi_tis_spi_match);
+
+static struct spi_driver tpm_tis_spi_driver = {
+ .driver = {
+ .owner = THIS_MODULE,
+ .name = "tpm_tis_spi",
+ .pm = &tpm_tis_spi_pm,
+ .of_match_table = of_match_ptr(of_tis_spi_match),
+ .acpi_match_table = ACPI_PTR(acpi_tis_spi_match),
+ },
+ .probe = tpm_tis_spi_probe,
+ .remove = tpm_tis_spi_remove,
+ .id_table = tpm_tis_spi_id,
+};
+module_spi_driver(tpm_tis_spi_driver);
+
+MODULE_DESCRIPTION("TPM Driver for native SPI access");
+MODULE_LICENSE("GPL");
--
2.1.4
------------------------------------------------------------------------------
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