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From: Jarkko Sakkinen <jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>
To: Ed Swierk <eswierk-FilZDy9cOaHkQYj/0HfcvtBPR1lH4CV8@public.gmane.org>
Cc: tpmdd-devel-5NWGOfrQmneRv+LV9MX5uipxlwaOVQ5f@public.gmane.org
Subject: Re: [PATCH v2] tpm_tis: Increase ST19NP18 TPM command timeout to avoid chip lockup
Date: Tue, 7 Jun 2016 16:49:56 +0300	[thread overview]
Message-ID: <20160607134956.GC3855@intel.com> (raw)
In-Reply-To: <1465252079-126836-1-git-send-email-eswierk-FilZDy9cOaHkQYj/0HfcvtBPR1lH4CV8@public.gmane.org>

On Mon, Jun 06, 2016 at 03:27:59PM -0700, Ed Swierk wrote:
> The STMicro ST19NP18-TPM sometimes takes much longer to execute
> commands than it reports in its capabilities. For example, command 186
> (TPM_FlushSpecific) has been observed to take 14560 msec to complete,
> far longer than the 750 msec limit for "short" commands reported by
> the chip. The behavior has also been seen with command 101
> (TPM_GetCapability).
> 
> Worse, when the tpm_tis driver attempts to cancel the current command
> (by writing commandReady = 1 to TPM_STS_x), the chip locks up
> completely, returning all-1s from all memory-mapped register
> reads. The lockup can be cleared only by resetting the system.

Does this also happen when command doesn't take enormously long? I'm
just trying to understand does this contain one or two issues. I don't
know how hard this would be to test in practice with commands that last
750 ms (maybe with a quirk to kernel code).

> The occurrence of this excessive command duration depends on the
> sequence of commands preceding it. One sequence is creating at least 2
> new keys via TPM_CreateWrapKey, then letting the TPM idle for at least
> 30 seconds, then loading a key via TPM_LoadKey2. The next
> TPM_FlushSpecific occasionally takes tens of seconds to
> complete. Another sequence is creating many keys in a row without
> pause. The TPM_CreateWrapKey operation gets much slower after the
> first few iterations, as one would expect when the pool of precomputed
> keys is exhausted. Then after a 35-second pause, the same TPM_LoadKey2
> followed by TPM_FlushSpecific sequence triggers the behavior.
> 
> Our working theory is that this older TPM sometimes pauses to perform
> internal garbage collection, which modern chips implement as a
> background process. Without access to the chip's implementation
> details it's impossible to know whether any commands are immune to
> this behavior.  So it seems safest to ignore the chip's reported
> command durations, and use a value much higher than any observed
> duration, like 2 minutes (which happens to be the value used for
> TPM_UNDEFINED commands in tpm_calc_ordinal_duration()).
> 
> v2: Minor correction of patch description.
> 
> Signed-off-by: Ed Swierk <eswierk-FilZDy9cOaHkQYj/0HfcvtBPR1lH4CV8@public.gmane.org>

Acked-by: Jarkko Sakkinne <jarkko.sakkinen-VuQAYsv1563Yd54FQh9/CA@public.gmane.org>

/Jarkko

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      parent reply	other threads:[~2016-06-07 13:49 UTC|newest]

Thread overview: 5+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-06-06 22:27 [PATCH v2] tpm_tis: Increase ST19NP18 TPM command timeout to avoid chip lockup Ed Swierk
     [not found] ` <1465252079-126836-1-git-send-email-eswierk-FilZDy9cOaHkQYj/0HfcvtBPR1lH4CV8@public.gmane.org>
2016-06-07  1:07   ` Stefan Berger
     [not found]     ` <OFFA057E80.C169C00E-ON00257FCB.000588B0-85257FCB.0006225D-8eTO7WVQ4XIsd+ienQ86orlN3bxYEBpz@public.gmane.org>
2016-06-07  1:48       ` Ed Swierk
     [not found]         ` <CAO_EM_=ZgHV+3YRAuwiSUsqDOtreRhgEON_kPyJxb=1vQfm0eg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2016-06-07 13:52           ` Jarkko Sakkinen
2016-06-07 13:49   ` Jarkko Sakkinen [this message]

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