From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stephen Boyd Subject: Re: perf,arm -- another (different) fuzzer oops Date: Thu, 08 Aug 2013 10:44:16 -0700 Message-ID: <5203D8F0.9050602@codeaurora.org> References: <20130807223129.GA17118@mudshark.cambridge.arm.com> <5202D5B0.9020107@codeaurora.org> <20130808120939.GB18724@mudshark.cambridge.arm.com> Mime-Version: 1.0 Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20130808120939.GB18724@mudshark.cambridge.arm.com> Sender: trinity-owner@vger.kernel.org List-ID: Content-Type: text/plain; charset="us-ascii" To: Will Deacon Cc: Vince Weaver , "linux-kernel@vger.kernel.org" , Mark Rutland , Peter Zijlstra , Ingo Molnar , Paul Mackerras , Arnaldo Carvalho de Melo , "trinity@vger.kernel.org" On 08/08/13 05:09, Will Deacon wrote: > Well spotted, thanks. If you make that return -EINVAL instead of -ENOENT (to > match what we do for cache events) then: > > Acked-by: Will Deacon > > Could you stick it in the patch system please? Submitted as 7810/1 -- Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation