[U-Boot-Users] [PATCH] MIPS time.c fix

["Robert Deliën" <robert.delien@nxp.com>]

> The above is not true for all MIPS.  A lot (almost all) of older MIPS
> parts run the cpu CP0 counter at half the core clock rate.

Thanks for your feedback; I wasn't aware of this. I've encountered a couple
of /2 constructions in some configurations, but I though that was just a
quick fix that degrades the granularity of the timer by half in order to
prevent overflows in net.c.

> I would suggest changing CPU_CLOCK_RATE to CPU_CP0_COUNT_RATE since
> they are not always the same.

I have changed it to CFG_CP0_COUNT_RATE, if you don't mind. The IncaIP and
Purple platform seem to have cores with half-speed COUNT registers so those
have been fixed too. Behold the new patch ;-)

-------------- next part --------------
A non-text attachment was scrubbed...
Name: mips_timer2.diff
Type: application/octet-stream
Size: 6651 bytes
Desc: not available
Url : http://lists.denx.de/pipermail/u-boot/attachments/20061211/8d42666e/attachment.obj