From mboxrd@z Thu Jan  1 00:00:00 1970
From: =?ks_c_5601-1987?B?vcm09sHW?= <djshim@armitel.com>
Date: Fri, 15 Nov 2002 11:35:12 +0900
Subject: [U-Boot-Users] Re: U-Boot-Users digest, Vol 1 #22 - 1 msg
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I think that SRAM need not UPM table. SRAM device must be connected GPCM not UPMx.

----- Original Message ----- 
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To: <u-boot-users@lists.sourceforge.net>
Sent: Friday, November 15, 2002 5:25 AM
Subject: U-Boot-Users digest, Vol 1 #22 - 1 msg


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> Today's Topics:
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>    1. MPC860T - UPM SRAM (My-Hong Vuong)
> 
> --__--__--
> 
> Message: 1
> From: My-Hong Vuong <My-Hong.Vuong@au.thalesgroup.com>
> To: u-boot-users at lists.sourceforge.net
> Date: Thu, 14 Nov 2002 19:18:04 +1100
> Subject: [U-Boot-Users] MPC860T - UPM SRAM
> 
> Hi,
> 
> I've been trying to get SRAM working with ppcboot v 2.0.  My SRAM is a
> Samsung K1S321615M UtRAM - we are using this due to it's high capacity
> and low noise.
> 
> I am using (largely butchered) code based on the gen860t.
> Currently I have it configured in ppcboot on CS2:
> 
> #define BR2 0x00000081
> #define OR2 0xfc000100
> 
> and my upm table is:
> 0x00f3fc04, 0x00f3cc04, 0x00f3cc04, 0x10f3ec04,
> 0xf1f7fc04, 0xfffffc04, 0x0fffcc24, 0x0fffcc04,
> 0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x03ffcc4c,
> 0x08ffcc00, 0x03ffcc4c, 0x08ffcc00, 0x33ffcc47,
> 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
> 0xffffffff, 0xffffffff, 0xffffcc04, 0xc0ffdc04,
> 0x00ff4c04, 0x00ffcc04, 0x00ffcc04, 0x10ffec04,
> 0xf1fffc04, 0xfffffc04, 0x0fafcc04, 0x0cafcc00,
> 0x01afcc4c, 0x0cafcc00, 0x01afcc4c, 0x0cafcc00,
> 0x01afcc4c, 0x0cafcc00, 0x31bfcc43, 0xffffffff,
> 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
> 0xffffffff, 0xffffffff, 0xc0ffcc84, 0xfffffc05,
> 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
> 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
> 0xffffffff, 0xffffffff, 0x33ffcc07, 0xffffffff,
> 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
> 
> from mcuinit.
> 
> dumping variables, i have MAMR at 0x00000000 and MPTPR at 0x0000 (i
> have not set MAR to anything tho)
> 
> i have also made sure that my MCR has been set to CS2 -> to upmconfig()
> in cpu/mpc8xx/cpu.c i have modified the MCR line:
> 
> memctl->memc_mcr = addr | upm | 0x00004100;
> 
> with all this in place, I am quite certain that I have turned off the
> refresh timers associated with UPMA, however, ppcboot still refuses to
> copy successfully into SRAM.
> 
> I tried to set a breakpoint at the "relocate_code" so by that time it
> should have configured the UPMA table, however, trying to even do a 
> set {int} 0x0 = 0xaaaaaaaa
> does not work.
> 
> AFAIK, it also does configure the UPMA table before setting or2 and
> br2.
> 
> With the same parameters outlined above, I have been able to enter the
> same things using GDB - i have written macros to enter in the mdr/mcr
> variables as well as configure the BRx and ORx (I can write and read
> from SRAM).
> 
> We have thought about using GPCM, but due to the SRAM requiring bank
> select functionality, it is a non-option.
> 
> Can anyone help me with this problem??  Has anyone used similar
> technology - no DRAM??
> 
> Thanks in advance,
> My Hong Vuong
> 
> 
> 
> --__--__--
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