From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8C25BC8303F for ; Thu, 28 Aug 2025 14:02:54 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 04114832C8; Thu, 28 Aug 2025 16:02:53 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=race-technology.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=race-technology.com header.i=@race-technology.com header.b="TTzuIbgA"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id CEBAC8331C; Thu, 28 Aug 2025 14:32:03 +0200 (CEST) Received: from server.race-technology.com (mail.race-technology.com [178.32.229.33]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 6AF97831B4 for ; Thu, 28 Aug 2025 14:32:00 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=race-technology.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=andrew@race-technology.com DKIM-Filter: OpenDKIM Filter v2.11.0 server.race-technology.com C555671DFB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=race-technology.com; s=default; t=1756384319; bh=Ds26a22Dq9IBgL7g86Btio7agDIpDshxJXWaflSNIO8=; h=From:To:Cc:References:In-Reply-To:Subject:Date:From; b=TTzuIbgAK4N9fmS9V6WWRtjZEOTPmfVbTpqqbHSp0lt7kLhq1t2uG8BEGWCWgGKDt rreRuoghLs8pmqgrIRmLg3qo4TXAp/P5Sfv0YiXIWzU40L/b4022FK0aszzR+gXX4C XI+bxXaXPVnLI+dNvr7QSv6xuffqlbO8vDoPzNo9hN5VFxgTwxBdBw/vWJDhiHJ2SZ Xmh6VVObpAGuKalnRrXEmiqz4YeYCqU17cXKgb0nRCVAGQjKnV1sTpwYKy1Zvb0KgE 5FpK58TTkULB8PIx1laIALESTNmzfoqEUE5ZUIdRzh5WEMmqVjIPZv5GSdOj9sPP7K GtTk4fLLCRyXw== From: To: "'Peter Robinson'" Cc: References: <013401dc0165$67e6b5d0$37b42170$@race-technology.com> <06c801dc1807$bb6c31e0$324495a0$@race-technology.com> <367501dc1808$bf221880$3d664980$@race-technology.com> In-Reply-To: <367501dc1808$bf221880$3d664980$@race-technology.com> Subject: RE: RPI CM5 has 130s delay on boot Date: Thu, 28 Aug 2025 13:31:57 +0100 Message-ID: <008101dc1817$beb96dd0$3c2c4970$@race-technology.com> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Content-Language: en-gb Thread-Index: AQI0Qol1GYjyOuXYppzaqV3UiQe/nwGLCiRNAgqZI5ECSHMiO7OYuSBg X-Mailman-Approved-At: Thu, 28 Aug 2025 16:02:51 +0200 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Hi Peter, Thanks for talking the time to reply. The boot delay went away after changing the kernel command line console = setting. Previously it was on ttyAMA0, setting it to serial0 (ttyAMA10?) = which is the debug uart. I'm not clear on why - but I was happy it resolved and we can continue! Kind regards, Andy -----Original Message----- From: Peter Robinson Sent: 28 August 2025 10:17 To: andrew@race-technology.com Cc: u-boot@lists.denx.de Subject: Re: RPI CM5 has 130s delay on boot Hi Andrew, Sorry for the delayed reply. > I'm feeling a bit out my depth and hoping someone can help me. We've=20 > been using uboot on the RPI CM4 with great success, it's been perfect. > > We are migrating some projects to the RPI CM5 but have hit a=20 > roadblock. The boot process regularly (but not always) gets stuck for=20 > exactly 130s, as shown here: So I don't have a CM5, only a couple of RPi5s, the early and later revs, = for U-Boot testing/development. > [ 3.403341] Waiting for root device /dev/mmcblk0p2... > [ 3.403453] usb 1-1.7: Product: WS170120 [ 3.403454] usb 1-1.7:=20 > Manufacturer: WaveShare [ 3.403455] usb 1-1.7: SerialNumber: 220211 [=20 > 3.429612] input: WaveShare WS170120 Touchscreen as=20 > /devices/platform/axi/1000480000.usb/usb1/1-1/1-1.7/1-1.7:1.0/0003:0EE > F:0005 > .0001/input/input0 > [ 3.443253] hid-generic 0003:0EEF:0005.0001: input,hiddev96,hidraw0:=20 > USB HID > v1.11 Device [WaveShare WS170120] on usb-1000480000.usb-1.7/input0 [=20 > 134.202779] mmc0: Command Queue Engine enabled, 16 tags [ 134.208450] > mmc0: new HS400 Enhanced strobe MMC card at address 0001 [ 134.215432] > mmcblk0: mmc0:0001 BJTD4R 29.1 GiB [ 134.221178] mmcblk0: p1 p2 p3 p4=20 > < p5 p6 > [ 134.226023] mmcblk0: mmc0:0001 BJTD4R 29.1 GiB [=20 > 134.230952] mmcblk0boot0: mmc0:0001 BJTD4R 4.00 MiB > > > > After searching, this appears to be the same issue as reported here: > > > > https://lore.kernel.org/u-boot/421019670.5226453.1745000686387@mail.ya > hoo.co > m/ > > > > but I cannot see any solution. Can anyone assist please? Is this the eMMC that's built into the SoM or is it external on a = carrier board? Can you provide more details. On the RPi5 the uSD slot is using the SoC built in controller, I presume = that's the case on the CM5 or whatever you're using as the RP1 needs to = be bought up first. We don't currently support the RP1 in U-Boot so I'm = not sure that's coming into play, I suspect purely the SDHCI = controllers. Unfortunately the details of most of the broadcom chips are closed and = even the RPi U-Boot maintainers don't have access to those so we might = be at a bit of a loss ATM.