From mboxrd@z Thu Jan 1 00:00:00 1970 From: Daniel Schwierzeck Date: Wed, 30 Nov 2016 20:21:41 +0100 Subject: [U-Boot] [GIT PULL] u-boot-mips/master In-Reply-To: <20161130190110.GW2546@bill-the-cat> References: <148ab73c-5a47-e44d-c2ce-69d2efa22507@gmail.com> <20161130190110.GW2546@bill-the-cat> Message-ID: <00c5dec3-e4bb-d687-327e-b43cbda433ea@gmail.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Am 30.11.2016 um 20:01 schrieb Tom Rini: > On Wed, Nov 30, 2016 at 07:13:51PM +0100, Daniel Schwierzeck wrote: >> Hi Tom, >> >> Travis-CI build is green (one job has failed due to job time limit) >> >> https://travis-ci.org/danielschwierzeck/u-boot/builds/180114376 > > Note that if you head to > https://travis-ci.org/danielschwierzeck/u-boot/jobs/180114393 you can > tell it to re-start the job and it _should_ complete in time. But that > said, that also just failed for me and I think that means I'm going to > split it into ARM32 and ARM64 builds so it's not so close to failing due > to time. > >> The following changes since commit 6b29a395b62965eef6b5065d3a526a8588a92038: >> >> Merge git://git.denx.de/u-boot-mpc85xx (2016-11-29 19:42:48 -0500) >> >> are available in the git repository at: >> >> git://git.denx.de/u-boot-mips.git master >> >> for you to fetch changes up to 6fd596a1aa57bd431263f45b0c57ee8ae6b2403c: >> >> MIPS: Fix map_physmem for cached mappings (2016-11-30 16:18:19 +0100) >> >> ---------------------------------------------------------------- >> Daniel Schwierzeck (9): >> MIPS: make inclusion of ROM exception vectors configurable >> MIPS: fix ROM exception vectors >> MIPS: fix iand optimize setup of CP0 registers >> MIPS: factor out code for initial stack and global data >> MIPS: add possibility to setup initial stack and global data in SRAM >> MIPS: add asm-offsets for struct pt_regs >> MIPS: reserve space for exception vectors >> MIPS: add handling for generic and EJTAG exceptions >> common/board_f: enable initr_trap for MIPS >> >> Marek Vasut (1): >> mips: Let cache.h be included from assembly source > > Are there other parts of the Ci20 series you could apply as well? I'm > keen to see this (and then Ci40) go in as I have both platforms and > would like to get them in mainline and then worked into my test.py > framework, thanks! > not in this pull request. I'm going to create a new one when the review has finished. -- - Daniel -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 473 bytes Desc: OpenPGP digital signature URL: