From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5BE5DC77B75 for ; Tue, 9 May 2023 11:03:01 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 58A8B847D6; Tue, 9 May 2023 13:02:59 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Received: by phobos.denx.de (Postfix, from userid 109) id 7FF9B847DB; Tue, 9 May 2023 13:02:58 +0200 (CEST) Received: from mail-m11879.qiye.163.com (mail-m11879.qiye.163.com [115.236.118.79]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id 86B5C855D9 for ; Tue, 9 May 2023 13:02:54 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=rock-chips.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=kever.yang@rock-chips.com Received: from [192.168.0.116] (unknown [112.49.211.222]) by mail-m11879.qiye.163.com (Hmail) with ESMTPA id 99C4A6803CF; Tue, 9 May 2023 19:02:46 +0800 (CST) Message-ID: <0107ca5f-e116-e941-8d2b-41c6ff18b91d@rock-chips.com> Date: Tue, 9 May 2023 19:02:46 +0800 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.10.0 Subject: Re: [PATCH 08/14] rockchip: rk3568-rock-3a: Enable boot from SPI NOR flash Content-Language: en-US To: Jonas Karlman , Simon Glass , Philipp Tomsich , Akash Gajjar Cc: u-boot@lists.denx.de References: <20230422012309.402799-1-jonas@kwiboo.se> <20230422012309.402799-9-jonas@kwiboo.se> From: Kever Yang In-Reply-To: <20230422012309.402799-9-jonas@kwiboo.se> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-HM-Spam-Status: e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly tZV1koWUFITzdXWS1ZQUlXWQ8JGhUIEh9ZQVkaSB9OVh5NGB9MGE8dHxhDH1UTARMWGhIXJBQOD1 lXWRgSC1lBWUpKSVVPQlVJSkpVSUlJWVdZFhoPEhUdFFlBWU9LSFVKTkxJSklVSktLVUpCWQY+ X-HM-Tid: 0a88002d933c2eb5kusn99c4a6803cf X-HM-MType: 1 X-HM-Sender-Digest: e1kMHhlZQR0aFwgeV1kSHx4VD1lBWUc6ORw6Dgw*Sz0VFSsrERcVNR4N Eh9PC01VSlVKTUNITUhLSk1MTkxJVTMWGhIXVRAeDR4JVQIaFRw7CRQYEFYYExILCFUYFBZFWVdZ EgtZQVlKSklVT0JVSUpKVUlJSVlXWQgBWUFNS0tPNwY+ X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean On 2023/4/22 09:23, Jonas Karlman wrote: > Add sfc and flash node to device tree and config options to enable > support for booting from SPI NOR flash on Radxa ROCK 3 Model A. > > Unlike prior generation SoCs the BootRom in RK3568 can read all data and > look for idbloader at 0x8000, same as on SD and eMMC. > > Use the rksd format and modify the mkimage offset to generate a bootable > u-boot-rockchip-spi.bin that can be written to 0x0 of SPI NOR flash. The > FIT image is loaded from 0x60000. > > => sf probe > SF: Detected mx25u12835f with page size 256 Bytes, erase size 4 KiB, total 16 MiB > > => load mmc 1:1 10000000 u-boot-rockchip-spi.bin > 1384448 bytes read in 119 ms (11.1 MiB/s) > > => sf update $fileaddr 0 $filesize > device 0 offset 0x0, size 0x152000 > 1179648 bytes written, 204800 bytes skipped in 9.901s, speed 143185 B/s > > Signed-off-by: Jonas Karlman Reviewed-by: Kever Yang Thanks, - Kever > --- > arch/arm/dts/rk3568-rock-3a-u-boot.dtsi | 25 +++++++++++++++++++++++++ > arch/arm/dts/rk356x-u-boot.dtsi | 11 +++++++++++ > configs/rock-3a-rk3568_defconfig | 10 ++++++++++ > 3 files changed, 46 insertions(+) > > diff --git a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi > index b2af3b1dbed6..7cd2dc80c317 100644 > --- a/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi > +++ b/arch/arm/dts/rk3568-rock-3a-u-boot.dtsi > @@ -7,6 +7,10 @@ > #include "rk356x-u-boot.dtsi" > > / { > + aliases { > + spi0 = &sfc; > + }; > + > chosen { > stdout-path = &uart2; > u-boot,spl-boot-order = "same-as-spl", &sdmmc0, &sdhci; > @@ -33,6 +37,10 @@ > bootph-pre-ram; > }; > > +&fspi_pins { > + bootph-pre-ram; > +}; > + > &sdmmc0_bus4 { > bootph-pre-ram; > }; > @@ -65,6 +73,23 @@ > bootph-pre-ram; > }; > > +&sfc { > + bootph-pre-ram; > + u-boot,spl-sfc-no-dma; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "okay"; > + > + flash@0 { > + bootph-pre-ram; > + compatible = "jedec,spi-nor"; > + reg = <0>; > + spi-max-frequency = <24000000>; > + spi-rx-bus-width = <4>; > + spi-tx-bus-width = <1>; > + }; > +}; > + > &sdhci { > cap-mmc-highspeed; > mmc-ddr-1_8v; > diff --git a/arch/arm/dts/rk356x-u-boot.dtsi b/arch/arm/dts/rk356x-u-boot.dtsi > index a1c2d03c52f0..c340c2bba6ff 100644 > --- a/arch/arm/dts/rk356x-u-boot.dtsi > +++ b/arch/arm/dts/rk356x-u-boot.dtsi > @@ -68,3 +68,14 @@ > bootph-pre-ram; > status = "okay"; > }; > + > +#ifdef CONFIG_ROCKCHIP_SPI_IMAGE > +&binman { > + simple-bin-spi { > + mkimage { > + args = "-n", CONFIG_SYS_SOC, "-T", "rksd"; > + offset = <0x8000>; > + }; > + }; > +}; > +#endif > diff --git a/configs/rock-3a-rk3568_defconfig b/configs/rock-3a-rk3568_defconfig > index 2e556dc2c1a2..64864a300153 100644 > --- a/configs/rock-3a-rk3568_defconfig > +++ b/configs/rock-3a-rk3568_defconfig > @@ -8,15 +8,20 @@ CONFIG_SPL_LIBGENERIC_SUPPORT=y > CONFIG_NR_DRAM_BANKS=2 > CONFIG_HAS_CUSTOM_SYS_INIT_SP_ADDR=y > CONFIG_CUSTOM_SYS_INIT_SP_ADDR=0xc00000 > +CONFIG_SF_DEFAULT_SPEED=24000000 > +CONFIG_SF_DEFAULT_MODE=0x2000 > CONFIG_DEFAULT_DEVICE_TREE="rk3568-rock-3a" > CONFIG_ROCKCHIP_RK3568=y > CONFIG_SPL_ROCKCHIP_COMMON_BOARD=y > +CONFIG_ROCKCHIP_SPI_IMAGE=y > CONFIG_SPL_SERIAL=y > CONFIG_SPL_STACK_R_ADDR=0x600000 > CONFIG_TARGET_EVB_RK3568=y > CONFIG_SPL_STACK=0x400000 > CONFIG_DEBUG_UART_BASE=0xFE660000 > CONFIG_DEBUG_UART_CLOCK=24000000 > +CONFIG_SPL_SPI_FLASH_SUPPORT=y > +CONFIG_SPL_SPI=y > CONFIG_SYS_LOAD_ADDR=0xc00800 > CONFIG_DEBUG_UART=y > CONFIG_FIT=y > @@ -34,6 +39,8 @@ CONFIG_SPL_BSS_MAX_SIZE=0x4000 > # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set > # CONFIG_SPL_SHARES_INIT_SP_ADDR is not set > CONFIG_SPL_STACK_R=y > +CONFIG_SPL_SPI_LOAD=y > +CONFIG_SYS_SPI_U_BOOT_OFFS=0x60000 > CONFIG_SPL_ATF=y > CONFIG_CMD_GPIO=y > CONFIG_CMD_GPT=y > @@ -59,6 +66,8 @@ CONFIG_MMC_DW_ROCKCHIP=y > CONFIG_MMC_SDHCI=y > CONFIG_MMC_SDHCI_SDMA=y > CONFIG_MMC_SDHCI_ROCKCHIP=y > +CONFIG_SPI_FLASH_MACRONIX=y > +CONFIG_SPI_FLASH_XTX=y > CONFIG_ETH_DESIGNWARE=y > CONFIG_GMAC_ROCKCHIP=y > CONFIG_PHY_ROCKCHIP_INNO_USB2=y > @@ -72,6 +81,7 @@ CONFIG_SPL_RAM=y > CONFIG_BAUDRATE=1500000 > CONFIG_DEBUG_UART_SHIFT=2 > CONFIG_SYS_NS16550_MEM32=y > +CONFIG_ROCKCHIP_SFC=y > CONFIG_SYSRESET=y > CONFIG_USB=y > CONFIG_USB_XHCI_HCD=y