From: DeLaGarza, Robert <robdlg@att.net>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] mpc8245 timer
Date: Tue, 15 Apr 2003 01:42:13 -0700 [thread overview]
Message-ID: <01C302F0.40E40DC0.robdlg@att.net> (raw)
The following code appears in u-boot-0.3.0/cpu/mpc824x/cpu.c
/*
* Get timebase clock frequency (like cpu_clk in Hz)
* This is the sys_logic_clk (memory bus) divided by 4
*/
unsigned long get_tbclk (void)
{
return ((get_bus_freq (0) + 2L) / 4L);
}
However, in Table 11-11 of the _MPC8245 Integrated Processor User's Manual_,
there is the statement "The timers operate at 1/8 the speed of the SDRAM_CLK signal."
Should the divisor in get_tbclk( ) be 8L for the MPC8245?
(I know there are several '8245 and '8241 boards using PPCBoot and/or U-Boot, so my
guess is that the manual is wrong, but I didn't see anything in the errata about this.)
next reply other threads:[~2003-04-15 8:42 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2003-04-15 8:42 DeLaGarza, Robert [this message]
2003-04-15 8:59 ` [U-Boot-Users] mpc8245 timer Wolfgang Denk
-- strict thread matches above, loose matches on Subject: below --
2003-04-16 7:51 DeLaGarza, Robert
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