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From: "Chanho Park" <chanho61.park@samsung.com>
To: "'Heinrich Schuchardt'" <xypron.glpk@gmx.de>
Cc: "'Sughosh Ganu'" <sughosh.ganu@linaro.org>,
	<u-boot@lists.denx.de>, "'Rick Chen'" <rick@andestech.com>,
	"'Leo'" <ycliang@andestech.com>,
	"'Jaehoon Chung'" <jh80.chung@samsung.com>
Subject: RE: [PATCH v3 3/5] rng: Add StarFive JH7110 RNG driver
Date: Wed, 1 Nov 2023 21:10:17 +0900	[thread overview]
Message-ID: <01c701da0cbc$60e227f0$22a677d0$@samsung.com> (raw)
In-Reply-To: <e3df899c-0510-4dc1-8868-0c5a41732350@gmx.de>

Hi,

> -----Original Message-----
> From: Heinrich Schuchardt <xypron.glpk@gmx.de>
> Sent: Wednesday, November 1, 2023 9:00 PM
> To: Chanho Park <chanho61.park@samsung.com>
> Cc: Sughosh Ganu <sughosh.ganu@linaro.org>; u-boot@lists.denx.de; Rick
> Chen <rick@andestech.com>; Leo <ycliang@andestech.com>; Jaehoon Chung
> <jh80.chung@samsung.com>
> Subject: Re: [PATCH v3 3/5] rng: Add StarFive JH7110 RNG driver
> 
> On 11/1/23 13:40, Chanho Park wrote:
> > Adds to support JH7110 TRNG driver which is based on linux kernel's
> > jh7110-trng.c. This can support to generate 256-bit random numbers and
> > 128-bit but this makes 256-bit default for convenience.
> >
> > Signed-off-by: Chanho Park <chanho61.park@samsung.com>
> > ---
> >   drivers/rng/Kconfig      |   6 +
> >   drivers/rng/Makefile     |   1 +
> >   drivers/rng/jh7110_rng.c | 271 +++++++++++++++++++++++++++++++++++++++
> >   3 files changed, 278 insertions(+)
> >   create mode 100644 drivers/rng/jh7110_rng.c
> >
> > diff --git a/drivers/rng/Kconfig b/drivers/rng/Kconfig
> > index 994cc35b2744..0dba1e06b429 100644
> > --- a/drivers/rng/Kconfig
> > +++ b/drivers/rng/Kconfig
> > @@ -91,4 +91,10 @@ config TPM_RNG
> >   	  functionality. Enable random number generator on TPM
> >   	  devices.
> >
> > +config RNG_JH7110
> > +	bool "StarFive JH7110 Random Number Generator support"
> > +	depends on DM_RNG && STARFIVE_JH7110
> > +	help
> > +	  Enable True Random Number Generator in StarFive JH7110 SoCs.
> > +
> >   endif
> > diff --git a/drivers/rng/Makefile b/drivers/rng/Makefile
> > index 47b323e61ee3..9de762c8a1c3 100644
> > --- a/drivers/rng/Makefile
> > +++ b/drivers/rng/Makefile
> > @@ -15,3 +15,4 @@ obj-$(CONFIG_RNG_IPROC200) += iproc_rng200.o
> >   obj-$(CONFIG_RNG_SMCCC_TRNG) += smccc_trng.o
> >   obj-$(CONFIG_RNG_ARM_RNDR) += arm_rndr.o
> >   obj-$(CONFIG_TPM_RNG) += tpm_rng.o
> > +obj-$(CONFIG_RNG_JH7110) += jh7110_rng.o
> > diff --git a/drivers/rng/jh7110_rng.c b/drivers/rng/jh7110_rng.c
> > new file mode 100644
> > index 000000000000..075a2d78eb2c
> > --- /dev/null
> > +++ b/drivers/rng/jh7110_rng.c
> > @@ -0,0 +1,271 @@
> > +// SPDX-License-Identifier: GPL-2.0-or-later
> > +/*
> > + * TRNG driver for the StarFive JH7110 SoC
> > + *
> > + */
> > +
> > +#include <clk.h>
> > +#include <dm.h>
> > +#include <reset.h>
> > +#include <rng.h>
> > +#include <asm/io.h>
> > +#include <linux/iopoll.h>
> > +
> > +/* trng register offset */
> > +#define STARFIVE_CTRL			0x00
> > +#define STARFIVE_STAT			0x04
> > +#define STARFIVE_MODE			0x08
> > +#define STARFIVE_SMODE			0x0C
> > +#define STARFIVE_IE			0x10
> > +#define STARFIVE_ISTAT			0x14
> > +#define STARFIVE_RAND0			0x20
> > +#define STARFIVE_RAND1			0x24
> > +#define STARFIVE_RAND2			0x28
> > +#define STARFIVE_RAND3			0x2C
> > +#define STARFIVE_RAND4			0x30
> > +#define STARFIVE_RAND5			0x34
> > +#define STARFIVE_RAND6			0x38
> > +#define STARFIVE_RAND7			0x3C
> > +#define STARFIVE_AUTO_RQSTS		0x60
> > +#define STARFIVE_AUTO_AGE		0x64
> > +
> > +/* CTRL CMD */
> > +#define STARFIVE_CTRL_EXEC_NOP		0x0
> > +#define STARFIVE_CTRL_GENE_RANDNUM	0x1
> > +#define STARFIVE_CTRL_EXEC_RANDRESEED	0x2
> > +
> > +/* STAT */
> > +#define STARFIVE_STAT_NONCE_MODE	BIT(2)
> > +#define STARFIVE_STAT_R256		BIT(3)
> > +#define STARFIVE_STAT_MISSION_MODE	BIT(8)
> > +#define STARFIVE_STAT_SEEDED		BIT(9)
> > +#define STARFIVE_STAT_LAST_RESEED(x)	((x) << 16)
> > +#define STARFIVE_STAT_SRVC_RQST		BIT(27)
> > +#define STARFIVE_STAT_RAND_GENERATING	BIT(30)
> > +#define STARFIVE_STAT_RAND_SEEDING	BIT(31)
> > +#define STARFIVE_STAT_RUNNING		(STARFIVE_STAT_RAND_GENERATING | \
> > +					 STARFIVE_STAT_RAND_SEEDING)
> > +
> > +/* MODE */
> > +#define STARFIVE_MODE_R256		BIT(3)
> > +
> > +/* SMODE */
> > +#define STARFIVE_SMODE_NONCE_MODE	BIT(2)
> > +#define STARFIVE_SMODE_MISSION_MODE	BIT(8)
> > +#define STARFIVE_SMODE_MAX_REJECTS(x)	((x) << 16)
> > +
> > +/* IE */
> > +#define STARFIVE_IE_RAND_RDY_EN		BIT(0)
> > +#define STARFIVE_IE_SEED_DONE_EN	BIT(1)
> > +#define STARFIVE_IE_LFSR_LOCKUP_EN	BIT(4)
> > +#define STARFIVE_IE_GLBL_EN		BIT(31)
> > +
> > +#define STARFIVE_IE_ALL			(STARFIVE_IE_GLBL_EN | \
> > +					 STARFIVE_IE_RAND_RDY_EN | \
> > +					 STARFIVE_IE_SEED_DONE_EN | \
> > +					 STARFIVE_IE_LFSR_LOCKUP_EN)
> > +
> > +/* ISTAT */
> > +#define STARFIVE_ISTAT_RAND_RDY		BIT(0)
> > +#define STARFIVE_ISTAT_SEED_DONE	BIT(1)
> > +#define STARFIVE_ISTAT_LFSR_LOCKUP	BIT(4)
> > +
> > +#define STARFIVE_RAND_LEN		sizeof(u32)
> > +
> > +enum mode {
> > +	PRNG_128BIT,
> > +	PRNG_256BIT,
> > +};
> > +
> > +struct starfive_trng_plat {
> > +	void *base;
> > +	struct clk *hclk;
> > +	struct clk *ahb;
> > +	struct reset_ctl *rst;
> > +	u32 mode;
> > +};
> > +
> > +static inline int starfive_trng_wait_idle(struct starfive_trng_plat
> *trng)
> > +{
> > +	u32 stat;
> > +
> > +	return readl_relaxed_poll_timeout(trng->base + STARFIVE_STAT, stat,
> > +					  !(stat & STARFIVE_STAT_RUNNING),
> > +					  100000);
> > +}
> > +
> > +static inline void starfive_trng_irq_mask_clear(struct
> starfive_trng_plat *trng)
> > +{
> > +	/* clear register: ISTAT */
> > +	u32 data = readl(trng->base + STARFIVE_ISTAT);
> > +
> > +	writel(data, trng->base + STARFIVE_ISTAT);
> > +}
> > +
> > +static int starfive_trng_cmd(struct starfive_trng_plat *trng, u32 cmd)
> > +{
> > +	u32 stat, flg;
> > +	int ret;
> > +
> > +	switch (cmd) {
> > +	case STARFIVE_CTRL_GENE_RANDNUM:
> > +		writel(cmd, trng->base + STARFIVE_CTRL);
> > +		flg = STARFIVE_ISTAT_RAND_RDY;
> > +		break;
> > +	case STARFIVE_CTRL_EXEC_RANDRESEED:
> > +		writel(cmd, trng->base + STARFIVE_CTRL);
> > +		flg = STARFIVE_ISTAT_SEED_DONE;
> > +		break;
> > +	default:
> > +		return -EINVAL;
> > +	}
> > +
> > +	ret = readl_relaxed_poll_timeout(trng->base + STARFIVE_ISTAT, stat,
> > +					 (stat & flg), 1000);
> > +	writel(flg, trng->base + STARFIVE_ISTAT);
> > +
> > +	return ret;
> > +}
> > +
> > +static int starfive_trng_read(struct udevice *dev, void *data, size_t
> len)
> > +{
> > +	struct starfive_trng_plat *trng = dev_get_plat(dev);
> > +	u8 *buffer = data;
> > +	int iter_mask;
> > +
> > +	if (trng->mode == PRNG_256BIT)
> > +		iter_mask = 7;
> > +	else
> > +		iter_mask = 3;
> > +
> > +	for (int i = 0; len; ++i, i &= iter_mask) {
> > +		u32 val;
> > +		size_t step;
> > +		int ret;
> > +
> 
> I think you are missing
> 
>     if (!i) {
> 
> here as one call to starfive_trng_cmd is giving you 128 or 256 bits of
> entropy.
> 
> > +		ret = starfive_trng_cmd(trng, STARFIVE_CTRL_GENE_RANDNUM);
> 
> }

Oh. I missed this while I made the patches. Thanks for the heads up.
I'll quickly update it in the next patch.

Best Regards,
Chanho Park


  reply	other threads:[~2023-11-01 12:10 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
     [not found] <CGME20231101114039epcas2p44be11b1fc5e3a93d1527bb86831d0043@epcas2p4.samsung.com>
2023-11-01 11:40 ` [PATCH v3 0/5] Add support for StarFive JH7110 TRNG driver Chanho Park
2023-11-01 11:40   ` [PATCH v3 1/5] riscv: import read/write_relaxed functions Chanho Park
2023-11-01 11:40   ` [PATCH v3 2/5] clk: starfive: jh7110: Add security clocks Chanho Park
2023-11-01 11:40   ` [PATCH v3 3/5] rng: Add StarFive JH7110 RNG driver Chanho Park
2023-11-01 11:59     ` Heinrich Schuchardt
2023-11-01 12:10       ` Chanho Park [this message]
2023-11-01 11:40   ` [PATCH v3 4/5] riscv: dts: jh7110: Add rng device tree node Chanho Park
2023-11-01 11:40   ` [PATCH v3 5/5] configs: visionfive2: Enable JH7110 RNG driver Chanho Park

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