From: <Eugen.Hristev@microchip.com>
To: <clement.leger@bootlin.com>, <Ludovic.Desroches@microchip.com>
Cc: <u-boot@lists.denx.de>, <Nicolas.Ferre@microchip.com>,
<thomas.petazzoni@bootlin.com>, <Claudiu.Beznea@microchip.com>
Subject: Re: [PATCH v3 2/3] ARM: dts: at91: sama5d2: add TCB node
Date: Fri, 4 Mar 2022 09:32:16 +0000 [thread overview]
Message-ID: <01e61ac7-0ab3-ab42-5bd4-e8f847299cbe@microchip.com> (raw)
In-Reply-To: <20220304091222.33112-3-clement.leger@bootlin.com>
On 3/4/22 11:12 AM, Clément Léger wrote:
> Add the device-tree node to describe the TCB timer.
>
> Signed-off-by: Clément Léger <clement.leger@bootlin.com>
> ---
> arch/arm/dts/sama5d2.dtsi | 16 ++++++++++++++++
> 1 file changed, 16 insertions(+)
>
> diff --git a/arch/arm/dts/sama5d2.dtsi b/arch/arm/dts/sama5d2.dtsi
> index 038cd73c03..63588b27b8 100644
> --- a/arch/arm/dts/sama5d2.dtsi
> +++ b/arch/arm/dts/sama5d2.dtsi
> @@ -700,6 +700,22 @@
> clocks = <&h32ck>;
> };
>
> + tcb0: timer@f800c000 {
> + compatible = "atmel,sama5d2-tcb", "simple-mfd",
> + "syscon";
> + reg = <0xf800c000 0x100>;
> +
> + clocks = <&tcb0_clk>, <&tcb0_gclk>, <&clk32k>;
> + clock-names = "t0_clk", "gclk", "slow_clk";
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + timer0: timer@0 {
> + compatible = "atmel,tcb-timer";
> + reg = <0>, <1>;
> + };
> + };
Hello Clement,
As discussed in v2, interrupts property is mandatory.
Eugen
> +
> watchdog@f8048040 {
> compatible = "atmel,sama5d4-wdt";
> reg = <0xf8048040 0x10>;
> --
> 2.34.1
>
next prev parent reply other threads:[~2022-03-04 9:32 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-03-04 9:12 [PATCH v3 0/3] add TCB driver for sama5d2 Clément Léger
2022-03-04 9:12 ` [PATCH v3 1/3] timer: atmel_tcb_timer: add atmel_tcb driver Clément Léger
2022-03-04 9:12 ` [PATCH v3 2/3] ARM: dts: at91: sama5d2: add TCB node Clément Léger
2022-03-04 9:32 ` Eugen.Hristev [this message]
2022-03-04 9:35 ` Clément Léger
2022-03-04 9:12 ` [PATCH v3 3/3] configs: sama5d2: enable option CONFIG_ATMEL_TCB_TIMER Clément Léger
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