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Mon, 6 Nov 2023 19:24:07 +0900 (KST) Received: from jh80chung01 (unknown [10.113.111.84]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20231106102407epsmtip107de6d1a7574b4e72f60524b24270e64~VAaYd-wWa0536905369epsmtip1l; Mon, 6 Nov 2023 10:24:07 +0000 (GMT) From: "Jaehoon Chung" To: "'Marek Vasut'" , Cc: "'Nobuhiro Iwamatsu'" , "'Paul Barker'" , "'Peng Fan'" In-Reply-To: <20231105224304.103997-1-marek.vasut+renesas@mailbox.org> Subject: RE: [PATCH] mmc: renesas-sdhi: Disable clock after tuning reset when possible Date: Mon, 6 Nov 2023 19:24:07 +0900 Message-ID: <02b201da109b$5fc2fb00$1f48f100$@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Mailer: Microsoft Outlook 16.0 Content-Language: ko Thread-Index: AQFmIhw1QoS27VOomJxv65VNMSZrPQJSYQH3sUJfPUA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFupjk+LIzCtJLcpLzFFi42LZdlhTX/fEPo9Ug4vTFC3eNhdbtK68w2bx 5+QPVosfq76wWrzd28nuwOqx8sVsdo+zd3YweuycvY/J48Dkc6weG9/tYApgjcq2yUhNTEkt UkjNS85PycxLt1XyDo53jjc1MzDUNbS0MFdSyEvMTbVVcvEJ0HXLzAFarqRQlphTChQKSCwu VtK3synKLy1JVcjILy6xVUotSMkpMC3QK07MLS7NS9fLSy2xMjQwMDIFKkzIzriw/TNTwU2l iqeXP7M3MM6X6WLk5JAQMJFYdbqbFcQWEtjBKPHmmlwXIxeQ/YlRYtnZb0xwzu9bl9lgOg5v n8IMkdjJKDF7+SsWCOclo8SidZ1gVWwCehL/Fy1kBrFFBPwl2t8uBitiFmhhlPjzdRMLSIJT wE1i4s4rQA0cHMICERKnzjuBhFkEVCS+H7rLDhLmFbCU6NsSCBLmFRCUODnzCVgns4C8xPa3 c5ghDlKQ+Pl0GStEXERidmcb1ForiZ7NW9hB1koI9HJILHzRwwrR4CJxaOs2JghbWOLVcZAi EFtK4vO7vWwQDc2MEkuXHGSFcHoYJf41XIf631hi/9LJTCDXMQtoSqzfpQ8RVpTY+XsuI8QV fBLvvoIs4wCK80p0tAlBlKhIXHr9kglm190n/1knMCrNQvLbLCS/zULyzyyEZQsYWVYxiqUW FOempxYbFpjCYzs5P3cTIzhhalnuYJz+9oPeIUYmDsZDjBIczEoivH/tPVKFeFMSK6tSi/Lj i0pzUosPMZoCA3sis5Rocj4wZeeVxBuaWBqYmBkZm1gYmhkqifOee9ubIiSQnliSmp2aWpBa BNPHxMEp1cCktdLf+eSSbRxh0/7m5r0u0/12eunR1UsedPv1Xvd+7XebX42nqjZlw5qK9Qnm R7efKHDbr7hprqfDUtdpwfz3vfN9Bde8a1h2KEfScgefZVg+S2s/80r217EnVgasKY6Rk7yT ZKq4zEP9lPDMHHufZ4v0Svt3ngvpdP4fwdbBUfrJ7moNn9ytN30/bYKvc1RumvBmllLJ3t7v WZb/9Wvm+E6vKbpdZJHu2XOn/HPJn6LiJ7KWs3MMXhz68/b5JL2WSMGDiefXrnnAXHpmb+V6 1xA+kzWTalsWurJt3hD+8cvap2t/N5Wnzcmw3Xv3psxp20eHVMw+HUtSZ82eFWbYPcff5Nba ry9dJv89fuymEktxRqKhFnNRcSIAK299oiEEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCLMWRmVeSWpSXmKPExsWy7bCSnO7xfR6pBjenKVq8bS62aF15h83i z8kfrBY/Vn1htXi7t5PdgdVj5YvZ7B5n7+xg9Ng5ex+Tx4HJ51g9Nr7bwRTAGsVlk5Kak1mW WqRvl8CVcWH7Z6aCm0oVTy9/Zm9gnC/TxcjJISFgInF4+xTmLkYuDiGB7YwS/64/ZIJISEl8 fjqVrYuRA8gWljh8uBgkLCTwnFGi5YENiM0moCfxf9FCZhBbRMBfov3tYhaQOcwCbUA1/zvZ IIZOZ5Ro3rGUHaSKU8BNYuLOK2wgtrBAmMSxBedZQWwWARWJ74fusoMs4xWwlOjbEggS5hUQ lDg58wkLiM0soC3R+7CVEcKWl9j+dg4zxJ0KEj+fLmOFiItIzO5sgzrISqJn8xb2CYzCs5CM moVk1Cwko2YhaV/AyLKKUTS1oDg3PTe5wFCvODG3uDQvXS85P3cTIzhitIJ2MC5b/1fvECMT B+MhRgkOZiUR3r/2HqlCvCmJlVWpRfnxRaU5qcWHGKU5WJTEeZVzOlOEBNITS1KzU1MLUotg skwcnFINTOvjYuLsshc6Bq+t2n7gQPsZqw0/zITLIq6v+lc/f6L3vLtlO1tyb5/oPv83vPjy K6vXt58wWTiH/LgleoxtzrKA6YEPTZbvsZkUxHS2cfXBn6+lnz7l/lQqqtQW4VXg+9/tA//t GTevXtWefHfLlf9WAlauCdrsdc8U3mlqT091U8lkzm7qfpriwxAq4l5T3lnw9cDdTk2p3iPG Nhfd5ixpueqqsciARdyB0XfmTUWrJL8W+dI92dZnp96ofDZv7m2/59OP7n/Ldm7ZJL+WSyLr lbas47V7ta1feOua3fXsaoqKunPqtJ9PKz3itWanbNHcTUUtJ37LP/Pbkx2tMfFUrfrtzfkx fUk/PrpIeimxFGckGmoxFxUnAgAamEHeBwMAAA== X-CMS-MailID: 20231106102407epcas1p245cf460db89d2033e14d8f14b3e09251 X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20231105224327epcas1p2d19ccbed6821310bf0f04dcd2a33da3c References: <20231105224304.103997-1-marek.vasut+renesas@mailbox.org> X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean > -----Original Message----- > From: Marek Vasut > Sent: Monday, November 6, 2023 7:43 AM > To: u-boot@lists.denx.de > Cc: Marek Vasut ; Jaehoon Chung ; Nobuhiro > Iwamatsu ; Paul Barker ; Peng Fan > > Subject: [PATCH] mmc: renesas-sdhi: Disable clock after tuning reset when possible > > Currently the renesas_sdhi_reset_tuning() unconditionally leaves SDHI > clock enabled after the tuning reset. This is not always necessary. > > After the driver performed tuning reset at the end of probe function, > or in the unlikely case that tuning failed during regular operation, > the SDHI clock can be disabled after the tuning reset. The following > set_ios call would reconfigure the clock as needed. > > In case of regular set_ios call which requires a tuning reset, keep > the clock enabled or disabled according to the mmc->clk_disable state. > > With this in place, the controllers which have not been accessed via > block subsystem after boot are left in quiescent state. However, if an > MMC device is used e.g. for environment storage, that controller would > be accessed during the environment load and left active, including its > clock which would still be generated. This is due to the design of the > MMC subsystem, which does not deinit a controller after it was started > once, the controller is only deinited in case of mmc rescan, or before > OS boot. > > Signed-off-by: Marek Vasut Reviewed-by: Jaehoon Chung Best Regards, Jaehoon Chung > --- > Note: To address the part where MMC device has been inited once and > is never deinited until rescan or OS boot, it would likely be > necessary to implement something like runtime PM, possibly > based on the cyclic framework. Basically, keep track of when > the MMC was accessed last, and if certain time elapsed, deinit > the MMC. This could also be used to handle card detect polling > at the same time. > --- > Cc: Jaehoon Chung > Cc: Nobuhiro Iwamatsu > Cc: Paul Barker > Cc: Peng Fan > --- > drivers/mmc/renesas-sdhi.c | 14 ++++++++++---- > 1 file changed, 10 insertions(+), 4 deletions(-) > > diff --git a/drivers/mmc/renesas-sdhi.c b/drivers/mmc/renesas-sdhi.c > index 8cd501c5f7c..97aaf1e4ec3 100644 > --- a/drivers/mmc/renesas-sdhi.c > +++ b/drivers/mmc/renesas-sdhi.c > @@ -318,7 +318,7 @@ static unsigned int renesas_sdhi_init_tuning(struct tmio_sd_priv *priv) > RENESAS_SDHI_SCC_DTCNTL_TAPNUM_MASK; > } > > -static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) > +static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv, bool clk_disable) > { > u32 reg; > > @@ -350,6 +350,12 @@ static void renesas_sdhi_reset_tuning(struct tmio_sd_priv *priv) > reg = tmio_sd_readl(priv, RENESAS_SDHI_SCC_RVSCNTL); > reg &= ~RENESAS_SDHI_SCC_RVSCNTL_RVSEN; > tmio_sd_writel(priv, reg, RENESAS_SDHI_SCC_RVSCNTL); > + > + if (clk_disable) { > + reg = tmio_sd_readl(priv, TMIO_SD_CLKCTL); > + reg &= ~TMIO_SD_CLKCTL_SCLKEN; > + tmio_sd_writel(priv, reg, TMIO_SD_CLKCTL); > + } > } > > static int renesas_sdhi_hs400(struct udevice *dev) > @@ -629,7 +635,7 @@ int renesas_sdhi_execute_tuning(struct udevice *dev, uint opcode) > out: > if (ret < 0) { > dev_warn(dev, "Tuning procedure failed\n"); > - renesas_sdhi_reset_tuning(priv); > + renesas_sdhi_reset_tuning(priv, true); > } > > return ret; > @@ -668,7 +674,7 @@ static int renesas_sdhi_set_ios(struct udevice *dev) > (mmc->selected_mode != UHS_SDR104) && > (mmc->selected_mode != MMC_HS_200) && > (mmc->selected_mode != MMC_HS_400)) { > - renesas_sdhi_reset_tuning(priv); > + renesas_sdhi_reset_tuning(priv, mmc->clk_disable); > } > #endif > > @@ -1095,7 +1101,7 @@ static int renesas_sdhi_probe(struct udevice *dev) > CONFIG_IS_ENABLED(MMC_HS200_SUPPORT) || \ > CONFIG_IS_ENABLED(MMC_HS400_SUPPORT) > if (priv->caps & TMIO_SD_CAP_RCAR_UHS) > - renesas_sdhi_reset_tuning(priv); > + renesas_sdhi_reset_tuning(priv, true); > #endif > return 0; > > -- > 2.42.0