From: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH] TI DaVinci: Driver for the davinci SPI controller
Date: Mon, 4 Jan 2010 16:12:11 +0530 [thread overview]
Message-ID: <02fa01ca8d2a$91fe37a0$b5faa6e0$@raj@ti.com> (raw)
In-Reply-To: <4B41B947.9090301@ge.com>
Hi Nick,
On Mon, Jan 04, 2010 at 15:17:51, Nick Thompson wrote:
> On 23/12/09 07:44, Sudhakar Rajashekhara wrote:
> > From: Sekhar Nori <nsekhar@ti.com>
> >
> > This adds a driver for the SPI controller found on davinci
> > based SoCs from Texas Instruments.
> >
> > Signed-off-by: Sekhar Nori <nsekhar@ti.com>
> > Signed-off-by: Sudhakar Rajashekhara <sudhakar.raj@ti.com>
> > ---
> > drivers/spi/Makefile | 1 +
> > drivers/spi/davinci_spi.c | 205 +++++++++++++++++++++++++++++++++++++++++++++
> > drivers/spi/davinci_spi.h | 84 ++++++++++++++++++
> > 3 files changed, 290 insertions(+), 0 deletions(-)
> > create mode 100644 drivers/spi/davinci_spi.c
> > create mode 100644 drivers/spi/davinci_spi.h
>
> ...
>
> > diff --git a/drivers/spi/davinci_spi.h b/drivers/spi/davinci_spi.h
> > new file mode 100644
> > index 0000000..b3bf916
> > --- /dev/null
> > +++ b/drivers/spi/davinci_spi.h
> > @@ -0,0 +1,84 @@
> > +/*
> > + * Register definitions for the DaVinci SPI Controller
> > + */
> > +
> > +/* Register offsets */
> > +#define DAVINCI_SPI_GCR0 0x0000
> > +#define DAVINCI_SPI_GCR1 0x0004
> > +#define DAVINCI_SPI_INT0 0x0008
> > +#define DAVINCI_SPI_LVL 0x000c
> > +#define DAVINCI_SPI_FLG 0x0010
> > +#define DAVINCI_SPI_PC0 0x0014
> > +#define DAVINCI_SPI_PC1 0x0018
> > +#define DAVINCI_SPI_PC2 0x001c
> > +#define DAVINCI_SPI_PC3 0x0020
> > +#define DAVINCI_SPI_PC4 0x0024
> > +#define DAVINCI_SPI_PC5 0x0028
> > +#define DAVINCI_SPI_DAT0 0x0038
> > +#define DAVINCI_SPI_DAT1 0x003c
> > +#define DAVINCI_SPI_BUF 0x0040
> > +#define DAVINCI_SPI_EMU 0x0044
> > +#define DAVINCI_SPI_DELAY 0x0048
> > +#define DAVINCI_SPI_DEF 0x004c
> > +#define DAVINCI_SPI_FMT0 0x0050
> > +#define DAVINCI_SPI_FMT1 0x0054
> > +#define DAVINCI_SPI_FMT2 0x0058
> > +#define DAVINCI_SPI_FMT3 0x005c
> > +#define DAVINCI_SPI_INTVEC0 0x0060
> > +#define DAVINCI_SPI_INTVEC1 0x0064
>
> I think this ought to be a C structure, rather than register offsets?
>
I see that existing SPI drivers are not using structures for register defines.
Off-late is there a shift in u-boot in favor of structures than macros for
register definitions?
Regards,
Sudhakar
next prev parent reply other threads:[~2010-01-04 10:42 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-12-23 7:44 [U-Boot] [PATCH] TI DaVinci: Driver for the davinci SPI controller Sudhakar Rajashekhara
2009-12-24 1:34 ` Mike Frysinger
2009-12-24 2:52 ` Sudhakar Rajashekhara
2009-12-25 17:11 ` Dirk Behme
2010-01-04 9:42 ` Sudhakar Rajashekhara
2010-01-04 9:46 ` Sudhakar Rajashekhara
2010-01-05 6:01 ` Mike Frysinger
2010-01-05 7:14 ` [U-Boot] NS16550 Register structure Pedanekar, Hemant
2010-01-05 7:35 ` Wolfgang Denk
2010-01-05 8:55 ` Pedanekar, Hemant
2010-01-05 9:58 ` Wolfgang Denk
2010-01-18 14:51 ` Pedanekar, Hemant
2010-01-19 13:04 ` Detlev Zundel
2010-01-21 11:58 ` Pedanekar, Hemant
2010-01-28 9:54 ` Pedanekar, Hemant
2010-01-28 11:00 ` Wolfgang Denk
2010-01-04 9:47 ` [U-Boot] [PATCH] TI DaVinci: Driver for the davinci SPI controller Nick Thompson
2010-01-04 10:42 ` Sudhakar Rajashekhara [this message]
2010-01-04 19:50 ` Dirk Behme
2010-01-05 0:20 ` Mike Frysinger
2010-03-05 6:47 ` Mansoor
2010-03-07 12:38 ` [U-Boot] OMAP3 SPI driver ( was Re: [PATCH] TI DaVinci: Driver for the davinci SPI controller) Dirk Behme
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