From mboxrd@z Thu Jan  1 00:00:00 1970
From: Stephan Linz <linz@mazet.de>
Date: Tue, 28 Oct 2003 14:03:42 +0100
Subject: [U-Boot-Users] need help for LAN91C111 driver
Message-ID: <03102814034202.02205@pcj86>
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To: u-boot@lists.denx.de

Hi,

I've found unexpected code inside of smc_phy_configure() in file 
drivers/smc91111.c:

	/* Enable PHY Interrupts (for register 18) */
	/* Interrupts listed here are disabled */
	smc_write_phy_register (PHY_INT_REG, 0xffff);

PHY_INT_REG is an read only register (all bits). So I don't understand the 
write access -- Why? Can anybody explain this step?

I think the corregt register have to be PHY_MASK_REG (register 19), which 
correspond to PHY_INT_REG (register 18) as interrupt mask.


Thanks, and best regards
-- 
Mit freundlichen Gruessen
Stephan Linz



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