From mboxrd@z Thu Jan 1 00:00:00 1970 From: Stefan Roese Date: Tue, 21 Jan 2020 09:44:29 +0100 Subject: [PATCH v3 10/20] mips: mtmips: rewrite lowlevel codes of mt7628 In-Reply-To: <1579594741-7053-1-git-send-email-weijie.gao@mediatek.com> References: <1579594741-7053-1-git-send-email-weijie.gao@mediatek.com> Message-ID: <04019db2-68c5-2b09-2fbb-ec20bf30fab3@denx.de> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 21.01.20 09:19, Weijie Gao wrote: > This patch rewrites the mtmips architecture with the following changes: > > 1. Move MT7628 soc parts into a subfolder. > 2. Lock parts of D-Cache as temporary stack. > 3. Reimplement DDR initialization in C language. > 4. Reimplement DDR calibration in a clear logic. > 5. Add full support for auto size detection for DDR1 and DDR2. > 6. Use accurate CPU clock depending on the input xtal frequency for timer > and delay functions. > > Note: > > print_cpuinfo() has incompatible parts with MT7620 so it's moved into > mt7628 subfolder. > > Signed-off-by: Weijie Gao > --- > Changes since v2: none Very nice work. Thanks again for working on this. One comment: The DDR size detection could be done by using the common get_ram_size() function. I'm not sure why you wrote your own code in this patch. Perhaps its related to code size. Anyways: Reviewed-by: Stefan Roese Thanks, Stefan