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charset="UTF-8" Content-Transfer-Encoding: quoted-printable Hello Yao, On Tue, 2026-11-03 at 13:30 +0000, Yao Zi wrote: > On Sat, Oct 17, 2026 at 07:41:20PM +0200, Thomas Perrot wrote: > > This series adds support for the BeagleBoard.org BeagleV-Ahead, a > > single > > board computer built around the T-Head TH1520 SoC (4x Xuantie C910) > > with > > 4 GB of LPDDR4X and 16 GB of eMMC. > >=20 > > Most of the work is already upstream: the TH1520 SoC support added > > for the > > Lichee Pi 4A (SPL, DDR controller, clock and pinctrl drivers, > > binman FIT > > generation) and the BeagleV-Ahead devicetree, which is available > > through > > OF_UPSTREAM. The board therefore only needs a small board > > directory, a > > U-Boot specific devicetree include and a defconfig. > >=20 > > The one missing piece is in the DDR controller driver, which only > > accepts > > the dual rank firmware and fails with -EINVAL on the BeagleV-Ahead. > > The > > first patch makes it program the rank configuration and the address > > map > > from the number of ranks described by the firmware. > >=20 > > As on the Lichee Pi 4A, u-boot-with-spl.bin contains the SPL, the > > DDR > > firmware, OpenSBI and U-Boot proper, and is loaded into SRAM > > through > > fastboot. > >=20 > > The BeagleV-Ahead has a single rank of LPDDR4X, so the DDR firmware > > has to > > be generated from lpddr4x-3733-singlerank.lua, which is already > > provided by > > https://github.com/ziyao233/th1520-firmware, instead of the dual > > rank > > configuration used by the Lichee Pi 4A. This is described in the > > documentation added by the third patch. > >=20 > > Testing: the series builds with the Bootlin riscv64 glibc toolchain > > (2026.08-1) together with OpenSBI v1.9, and produces a u-boot-with- > > spl.bin > > holding the SPL, the DDR firmware and the FIT image. > >=20 > > The image was loaded into SRAM through the BROM fastboot interface > > on a > > BeagleV-Ahead. Without the first patch the SPL stops with "failed > > to > > initialize DDR controller: -22". With it, the DDR is initialized > > with the > > single rank firmware, OpenSBI and U-Boot proper start, and the > > console > > reports "Model: BeagleV Ahead", "DRAM:=C2=A0 4 GiB", both MMC > > controllers and > > the Ethernet device. The Ethernet link, the eMMC and microSD > > accesses and > > writing U-Boot to the eMMC were not tested. The dual rank behavior > > is > > unchanged by the first patch, but I could not test it on a Lichee > > Pi 4A. > >=20 > > Signed-off-by: Thomas Perrot >=20 > lists.denx.de has been down for some time, and U-Boot has switched > to u-boot@lists.u-boot-project.org=C2=A0for development, please update > your > Git tree. >=20 > Please re-send the series to the available address, so there's a > public > copy available to everyone, and I'll continue to review, thanks for > your > patch. >=20 Thanks, Yao. I just resent it to the new mailing list. Kind regards, Thomas > Regards, > Yao Zi --=20 Thomas Perrot, Bootlin Embedded Linux and kernel engineering https://bootlin.com --=-2FpSz3Z1dQQ1/qFFgagG Content-Type: application/pgp-signature; name="signature.asc" Content-Description: This is a digitally signed message part -----BEGIN PGP SIGNATURE----- iQGzBAABCAAdFiEEh0B3xqajCiMDqBIhn8ALBXH+Cu0FAmrsjYAACgkQn8ALBXH+ Cu2DQgwAgjIfxzlHNq13b4wvi9PXjRX4FyuYNl3gb8jIjanKvLxNMU4gGz/8WGyE wtNdId/cwdTau7d5Ah2NSeGY6SKBa6Au2AcavFtjM5HjEXDXvREB7d5w7LuNY6OP aU/h+iMgdgLC3c0sbF+AHTOyklxV4LOqHOTbWrZhpZfRinTSDJsYNaF56BWyBNhM UPY6nwB2kRttwwHq1mJRSH0P9LDKROFWMk7v5pKMKG0PteOmoM0qiP/MZK94FGV/ wQEnfIK2aujFwrdMHrnXzMLyWy4DG2mm7WWc6xSCIy8wJSqn9c3KEx4gwpcZqaWE G64eTzmEcW7opfXLw4zMqeKtInBZVV9pE+unVfZkgtmOeEsP08IF3UPqln7IMlGJ jZcGOVYOETs/OSHDg1xnk8VDmihQOLC3W6/y1qWQKIv13VCPqXkRrpNQnCdRw/rg hikOPJIaHRw5/pOUcMRKVUifknLfuAi6ruPsX5XrEq8W+TQJ6+6MEEwS1QdeCcM5 pv+pD5By =epEG -----END PGP SIGNATURE----- --=-2FpSz3Z1dQQ1/qFFgagG--