From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 0162DC3DA7A for ; Fri, 6 Jan 2023 10:18:22 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id B3C30855F5; Fri, 6 Jan 2023 11:18:20 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=ti.com header.i=@ti.com header.b="oQWPzOET"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 1B1AD855F9; Fri, 6 Jan 2023 11:18:18 +0100 (CET) Received: from lelv0143.ext.ti.com (lelv0143.ext.ti.com [198.47.23.248]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id CBFAD855F3 for ; Fri, 6 Jan 2023 11:18:14 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=quarantine dis=none) header.from=ti.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=d-gole@ti.com Received: from fllv0034.itg.ti.com ([10.64.40.246]) by lelv0143.ext.ti.com (8.15.2/8.15.2) with ESMTP id 306AI1nS047686; Fri, 6 Jan 2023 04:18:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1673000282; bh=0Mlm1Lq8iG3K3YuDNrCHTah5N5GOriXYyX7yg3r3ioA=; h=Date:Subject:To:CC:References:From:In-Reply-To; b=oQWPzOETqJOWe5tx8yyQ5UKwFrU66FgPPotEGdXjy/BlQUMFir/U36pC1TWBnen+m KqWUFH6RgomrGfAkRgiVN/0oHyldatIJComa0N+1KlXL2I+6QjMeQDjBvp/WXcJMsp L8R7eDE0UCbfoESpfW2wcKl1vdcGKKkRW/7fBiT8= Received: from DFLE114.ent.ti.com (dfle114.ent.ti.com [10.64.6.35]) by fllv0034.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 306AI1HL029527 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 6 Jan 2023 04:18:01 -0600 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE114.ent.ti.com (10.64.6.35) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16; Fri, 6 Jan 2023 04:18:01 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2507.16 via Frontend Transport; Fri, 6 Jan 2023 04:18:01 -0600 Received: from [10.24.69.26] (ileaxei01-snat.itg.ti.com [10.180.69.5]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 306AHw02007273; Fri, 6 Jan 2023 04:17:59 -0600 Message-ID: <043a2b5c-e885-c857-c46a-e92285ac18cc@ti.com> Date: Fri, 6 Jan 2023 15:47:58 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.4.2 Subject: Re: [PATCH] mtd: spi-nor: Keep CFR5V[6] as 1 in Octal DTR enable To: , CC: , , , , Takahiro Kuwano References: <20230106033452.9635-1-Takahiro.Kuwano@infineon.com> Content-Language: en-US From: Dhruva Gole In-Reply-To: <20230106033452.9635-1-Takahiro.Kuwano@infineon.com> Content-Type: text/plain; charset="UTF-8"; format=flowed Content-Transfer-Encoding: 7bit X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean Hi Takahiro, On 06/01/23 09:04, tkuw584924@gmail.com wrote: > From: Takahiro Kuwano > > CFR5V[6] is reserved bit and must always be 1. > > Fixes: ea9a22f7e79c ("mtd: spi-nor-core: Add support for Cypress Semper flash") > Signed-off-by: Takahiro Kuwano > --- > include/linux/mtd/spi-nor.h | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/include/linux/mtd/spi-nor.h b/include/linux/mtd/spi-nor.h > index 30f15452aa68..181eb6710d7e 100644 > --- a/include/linux/mtd/spi-nor.h > +++ b/include/linux/mtd/spi-nor.h > @@ -194,7 +194,7 @@ > #define SPINOR_REG_CYPRESS_CFR3V_PGSZ BIT(4) /* Page size. */ > #define SPINOR_REG_CYPRESS_CFR3V_UNISECT BIT(3) /* Uniform sector mode */ > #define SPINOR_REG_CYPRESS_CFR5V 0x00800006 > -#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN 0x3 > +#define SPINOR_REG_CYPRESS_CFR5V_OCT_DTR_EN 0x43 I second Tudor's review on the linux-mtd mailing list here as well, (<493d9a10-aaf3-70f6-36c3-9a2cf39f0759@linaro.org>) This looks bad. Instead of overwriting CFR5V with whatever value, we should instead first read it and then update only the bit that we're interested in. If it happens to write CFR5V before octal enable/disable, you'll overwrite the previous set values. > #define SPINOR_OP_CYPRESS_RD_FAST 0xee > > /* Supported SPI protocols */ -- Thanks and Regards, Dhruva Gole