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Thu, 27 Jul 2023 17:13:00 +0900 (KST) Received: from jh80chung01 (unknown [10.113.111.84]) by epsmtip2.samsung.com (KnoxPortal) with ESMTPA id 20230727081300epsmtip29a40d284ea96089a3d6ad5bf5c8c8977~1q0x28rJF2259822598epsmtip2j; Thu, 27 Jul 2023 08:13:00 +0000 (GMT) From: "Jaehoon Chung" To: "'Roland Ruckerbauer'" , , Cc: "'Simon Glass'" , In-Reply-To: Subject: RE: Trying to boot JH7110 RISCV-V CPU from MMC Date: Thu, 27 Jul 2023 17:12:59 +0900 Message-ID: <06d101d9c062$284ca560$78e5f020$@samsung.com> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Outlook 16.0 Content-Language: ko Thread-Index: AQGsR3zcfEbBS52VvKCeYpBeXrvPFAIrCynxsBbWtxA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFuplk+LIzCtJLcpLzFFi42LZdljTQJdH/VCKwbNrihZTe+ItDv14zGjx bcs2Rou3ezvZLX50PWJ0YPWY3XCRxWPnrLvsHmfv7GD0mHCul8nj9lneANaobJuM1MSU1CKF 1Lzk/JTMvHRbJe/geOd4UzMDQ11DSwtzJYW8xNxUWyUXnwBdt8wcoN1KCmWJOaVAoYDE4mIl fTubovzSklSFjPziElul1IKUnALTAr3ixNzi0rx0vbzUEitDAwMjU6DChOyMrY37WAqu6FWc mr+OsYHxrEoXIyeHhICJxJn2FexdjFwcQgI7GCUOPJ3AApIQEvjEKHFxRRxEAsj+M3MZO0zH 0c4bTBBFOxkl+s+4QxS9ZJS4urCJDSTBJqAn8X/RQmYQW0QgU2LjxEVgU5kFbCQe7fnJCGJz CjhIvN7TAWYLC5hLLL54D2woi4CqROOhx2D1vAKWEj/2T4GyBSVOznwCNUdbYtnC18wQBylI /Hy6jBUiLiIxu7MNaq+VxOnFz1hAjpMQ+MsucX7peSaIBheJT+fnQzULS7w6vgXqMymJz+/2 skE0NDNKLF1ykBXC6WGU+NdwnQ2iylhi/9LJQJM4gNZpSqzfpQ8RVpTY+XsuI8QVfBLvvvaw gpRICPBKdLQJQZSoSFx6/ZIJZtfdJ/9ZJzAqzULy2ywkv81C8s8shGULGFlWMYqlFhTnpqcW GxaYwGM7OT93EyM4XWpZ7GCc+/aD3iFGJg7GQ4wSHMxKIryGMftShHhTEiurUovy44tKc1KL DzGaAkN7IrOUaHI+MGHnlcQbmlgamJgZGZtYGJoZKonzHnvVmyIkkJ5YkpqdmlqQWgTTx8TB KdXAZBBWVl2dq88nuXC+xJaEX+0v3gjPenF4ufzsFv5pty/y5umsuxPHxui8aqr1nsRK/3Vr v3PuOmdvtc/zvvxNlUszz2YaJ/9cLqaW1q7Tosk51eRGt1PtsuyJLTWRQTGvOk6fD41z1pq9 4q1D16oZp2e0tRRp8rz747HiymWBwLVbXLfwO149EibSoju5Z/k77vYtCn4zD2e76/k/KjFg 2ia5u3NniEtM5dSzRSc2i1i1nViqttWrlmXb+wjXe/VZ3/xinQ5L8M0/+3dmxKs1T9ps7/vz rP4mEFH6/eB2B9Ut8dkLFqp7Md/QmiRvYDvj+kfr3ItbtBvclLKjpvfK2/nulvp54VrqSb9v W406lFiKMxINtZiLihMBZ/kk3yAEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFvrCLMWRmVeSWpSXmKPExsWy7bCSvC6P+qEUg81NXBZTe+ItDv14zGjx bcs2Rou3ezvZLX50PWJ0YPWY3XCRxWPnrLvsHmfv7GD0mHCul8nj9lneANYoLpuU1JzMstQi fbsEroz1p7qZCrbrVWzoXMzawDhNpYuRk0NCwETiaOcNpi5GLg4hge2MEisbuhkhElISn59O Zeti5ACyhSUOHy6GqHnOKPGjcwsbSA2bgJ7E/0ULmUFsEYFsiZfNP8HizAJ2Eldf/2aHaJjI KPHs2j+wBKeAg8TrPR1gC4QFzCUWX7zHBGKzCKhKNB56zAJi8wpYSvzYPwXKFpQ4OfMJC8RQ bYneh62MMPayha+ZIQ5VkPj5dBkrRFxEYnZnG9RBVhKnFz9jmcAoPAvJqFlIRs1CMmoWkvYF jCyrGEVTC4pz03OTCwz1ihNzi0vz0vWS83M3MYIjRitoB+Oy9X/1DjEycTAeYpTgYFYS4TWM 2ZcixJuSWFmVWpQfX1Sak1p8iFGag0VJnFc5pzNFSCA9sSQ1OzW1ILUIJsvEwSnVwDT1oNHh vC2/2t4UFz18mfW2JeXG7ZzFhrff23OZ7nl6IpLRad5EXsGLvKkSG3tiq7zf//FP3r959wX3 VQJZEkkRnXG1H8QdY4LvbtufmHhgUvQEYa2DvpNsGr0s/5w+lPyr5qxvAkOH5O8b/P++bopa bFBdJHGsv1gxfuL/g5Yztn58N9Ev3rRs7/m9XsJTxM1ehb7NFtpodj91zu4Pm64/8rhu4vi2 +M6r40uK0s1X/HzXr3iDR1f8BMPEH+oWt98f/u7Vr2V5VcDvqsvriuk39Ta8WMjdJ8FS2C11 b0PZE4MXWblLi5etOvufqeH1iicvmSbuj4jgW9jJ8XWl6tlnOQ/XvNg0qywjWUDvhVSKEktx RqKhFnNRcSIAX1HUvwcDAAA= X-CMS-MailID: 20230727081300epcas1p3dae1b72706fea1c2cc35059f2e821a6e X-Msg-Generator: CA Content-Type: text/plain; charset="utf-8" X-Sendblock-Type: SVC_REQ_APPROVE CMS-TYPE: 101P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20230628124713epcas1p162e14619ac9fc518e44290597291f30c References: X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.8 at phobos.denx.de X-Virus-Status: Clean Hi, > -----Original Message----- > From: U-Boot On Behalf Of Roland Ruckerb= auer > Sent: Wednesday, June 28, 2023 4:52 AM > To: u-boot=40lists.denx.de; yanhong.wang=40starfivetech.com > Subject: Trying to boot JH7110 RISCV-V CPU from MMC >=20 > Hi=21 >=20 > I am trying to use upstream u-boot + opensbi, to boot my visionfive2 SBC > I got from external SD card. I had not much luck with the vendor > provided images / tools, they seem to have a lot of hard coded stuff and > just won=60t work correctly. >=20 > With upstream u-boot I followed the doc/board/starfive/visionfive2.rst > to the point, but unfortunately it did not work. >=20 > First I ran into an issue, where the chip would pick up a random SPL > somewhere else on the SD card, and so I could not test my build. > I fixed it by completely erasing the whole sdcard to make sure there can > be no other SPL/Uboot on it. This worked, but unfortunately > the sd card I made with the steps from > doc/board/starfive/visionfive2.rst still did not work. >=20 > I managed to figure out, that I need to make special modifications to > the first 2 sectors of the sd card (protective MBR and GPT header), using > https://protect2.fireeye.com/v1/url?k=3D61d64ba7-00ade130-61d7c0e8-74fe48= 60001d- > 48ffcb4bd9c5658e&q=3D1&e=3D38e576e4-b8ca-4e7f-92e3-90b65f990704&u=3Dhttps= %3A%2F%2Fgithub.com%2Fstarfive- > tech%2FTools%2Ftree%2Fmaster%2Fspl_tool. Calling > spl_tool -i -f /dev/sdb on my sdcard patches the first sectors with an > invalid > SPL, and also a offset to the backup SPL (which is the primary one I > flashed according to the documentation). >=20 > Maybe this should be added to the docu, otherwise it will not work, or > worse, load some other SPL also on the SD card and cause confusion. > There also is a mention in the docu, that the boot ROM searches for the > SPL by looking for the offset of its partition in the GPT with a specific > GUID. Not sure where this information comes from, but testing showed, > that its probably not true. >=20 >=20 > Now to my actual problem, hopefully someone can help: >=20 > The sdcard I built with u-boot and opensbi can now boot the spl, and > also start opensbi and load u-boot. Unfortunately > the init_sequence_r now fails with an error: initcall sequence > 00000000fffe0738 failed at call 0000000040216240 (err=3D-19) Did you find what's caused? It seems it's not working fine with latest yet. It seems that your analysis is right way. When I have tested on v2023.07-rc1, it's booting fine. So I did the git bisect from v2023.07-rc1 to master. 2023-05-04 16:50 -0600 Simon Glass * =5BHEAD=5D = =5Brefs/bisect/bad=5D dm: Emit the arch_cpu_init_dm() even only before relo= cation 2023-05-04 16:55 -0600 Simon Glass * =5Brefs/bise= ct/good-44dc33042f8465764bddeba4e4b362dd5372b74a=5D coreboot: Enable ms com= mand After applied the below patch, visionfive2 doesn't work fine. 55171aedda88d12666e2a1bbc661dea1bec65337 is the first bad commit commit 55171aedda88d12666e2a1bbc661dea1bec65337 Author: Simon Glass Date: Thu May 4 16:50:45 2023 -0600 dm: Emit the arch_cpu_init_dm() even only before relocation The original function was only called once, before relocation. The new one is called again after relocation. This was not the intent of the original call. Fix this by renaming and updating the calling logic. With this, chromebook_link64 makes it through SPL. Fixes: 7fe32b3442f0 (=22event: Convert arch_cpu_init_dm() to use events= =22) Signed-off-by: Simon Glass Reviewed-by: Bin Meng arch/arm/mach-imx/imx8/cpu.c =7C 2 +- arch/arm/mach-imx/imx8m/soc.c =7C 2 +- arch/arm/mach-imx/imx8ulp/soc.c =7C 2 +- arch/arm/mach-imx/imx9/soc.c =7C 2 +- arch/arm/mach-omap2/am33xx/board.c =7C 2 +- arch/arm/mach-omap2/hwinit-common.c =7C 2 +- arch/mips/mach-pic32/cpu.c =7C 2 +- arch/nios2/cpu/cpu.c =7C 2 +- arch/riscv/cpu/cpu.c =7C 2 +- arch/x86/cpu/baytrail/cpu.c =7C 2 +- arch/x86/cpu/broadwell/cpu.c =7C 2 +- arch/x86/cpu/ivybridge/cpu.c =7C 2 +- arch/x86/cpu/quark/quark.c =7C 2 +- arch/x86/lib/fsp2/fsp_init.c =7C 2 +- doc/develop/event.rst =7C 6 +++--- drivers/core/root.c =7C 4 ++-- drivers/cpu/microblaze_cpu.c =7C 2 +- include/event.h =7C 2 +- 18 files changed, 21 insertions(+), 21 deletions(-) Best Regards, Jaehoon Chung >=20 > Digging through the source and some printf debugging revealed to me, > that initr_dm_devices() fails, because it can not find > a timer device with in dm_timer_init() call. >=20 > For the JH7110 and pretty much any other RISCV chip the timer device > should be provided by the SBI, which is functioning correctly as far as > I can tell. I searched for it in the u-boot code, and figured out that > riscv_timer uboot driver should be probed, when the booting cpu is bound = to > its driver in the riscv_cpu_bind() function. >=20 > Unfortunately it seems like this cpu driver bind function is never > called before the initcall sequence crashed because of the missing timer > device. >=20 > That is pretty much everything I could figure out on my own until now, > but I am not sure what exactly is going wrong. > Hopefully it has nothing to do with how my local setup compiles the > code. u-boot seems to be using many tricks like the U_BOOT_DRIVER() macro > and others, maybe some of them do not guarantee to create entries in a > specific order, and the code accidentally depends on a specific order. >=20 > Maybe somebody can give me some pointers, I would appreciate it. >=20 > Greetings, > Roland Ruckerbauer