From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8080AC54EE9 for ; Thu, 8 Sep 2022 11:35:42 +0000 (UTC) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 4D7038403D; Thu, 8 Sep 2022 13:35:40 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="qKGims3j"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id D226383FF4; Thu, 8 Sep 2022 13:35:38 +0200 (CEST) Received: from mail-pj1-x102d.google.com (mail-pj1-x102d.google.com [IPv6:2607:f8b0:4864:20::102d]) (using TLSv1.3 with cipher TLS_AES_128_GCM_SHA256 (128/128 bits)) (No client certificate requested) by phobos.denx.de (Postfix) with ESMTPS id C6A868403D for ; Thu, 8 Sep 2022 13:35:35 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=jh80.chung@gmail.com Received: by mail-pj1-x102d.google.com with SMTP id z9-20020a17090a468900b001ffff693b27so2122064pjf.2 for ; Thu, 08 Sep 2022 04:35:35 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date; bh=xGLnJfM2sRqjgOfRSBZOEzU7aABu/aS97IjO438ZpkY=; b=qKGims3j0eKY2HpW48yigb53p+F8q1CaxLrkrQ/IGtDNTpkEZ5+04BlquiL57rrSDY 69+JxnPzdTiZeyVO95w5vSiDNdzz1/7cz6k6w7CFZXgagvEfwn3EsdVdXY9Grc8gu/ke OQ1+1wrBy0a6xwkHHE/vWA2OQX9erI9TEbGu48DbPGEB0busP89Y1uRVUxTmOaM2Woxh 1LPx2dBmOum/V2YCkgfRmc5R6dlzGCZ5F+96lytj/XR+jDeCwvOoYRlnq3CdOZSz4Rh0 3pu4GBQIxuSY8j1E3n5tHfO1GkV8V30dsp7fdT+4OBI/gvH2TF49e0tjBIQZOd5WmgUo wRjw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date; bh=xGLnJfM2sRqjgOfRSBZOEzU7aABu/aS97IjO438ZpkY=; b=Hs8NN/8/ZwLYBRwlv/0pRqQlrFzcrkyAu1nG3/vPXCrvRmihksQzcyUW5wax3jNUwW okMMuJaaFTH+se3RBi2mZf9N/82d8M0WBDRKgs2ET7HVIZToeYx/r5Y9YxarbZSVYyZ8 Y5ToYDHqMiE59E2pfBw3BhM2IbPLlzm0yLtwr/ssF4/1/BMsGmnScY0vjxQrHX/D4UNz U8Xsu/joDd4PPGBXe3YcNVNriZIXKQAHZtWMIi/gQOCbs+eBMTYJAx49kGzWcoDH2wFo fSCCQVyqz5trLac83iyZijw4pmT40KLQqLj9Cxstf2f1min7MCQak8Moa7MkiQ9rnrH/ VG/g== X-Gm-Message-State: ACgBeo3NFjzZuchdiIZscYgSLAMzG1X0hPjqiMILvp2C3HEzLyYAK3Vj RdAkcCakKc4nmSY7O5SblxQ= X-Google-Smtp-Source: AA6agR7qKo6z0W+3LlcRVKPaUUo4luHm4CJM6IxDWQoZhiMBmrxxiYoYlJhKrcjJKXkY1rb9q/fgPA== X-Received: by 2002:a17:902:d4c4:b0:170:9fdb:4a2a with SMTP id o4-20020a170902d4c400b001709fdb4a2amr8056074plg.137.1662636934129; Thu, 08 Sep 2022 04:35:34 -0700 (PDT) Received: from [192.168.0.19] ([183.99.112.216]) by smtp.gmail.com with ESMTPSA id b16-20020a170902e95000b0017541ecdcfesm14202916pll.229.2022.09.08.04.35.32 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 08 Sep 2022 04:35:33 -0700 (PDT) Message-ID: <074f5437-d8a2-f8a1-2be6-3dad8da09be1@gmail.com> Date: Thu, 8 Sep 2022 20:35:31 +0900 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:91.0) Gecko/20100101 Thunderbird/91.9.1 Subject: Re: [PATCH 2/2] mmc: f_sdh30: Add support for F_SDH30_E51 Content-Language: en-US To: Kunihiko Hayashi , Peng Fan , Jaehoon Chung , Jassi Brar Cc: u-boot@lists.denx.de References: <20220906003913.8846-1-hayashi.kunihiko@socionext.com> <20220906003913.8846-3-hayashi.kunihiko@socionext.com> From: Jaehoon Chung In-Reply-To: <20220906003913.8846-3-hayashi.kunihiko@socionext.com> Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 7bit X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.6 at phobos.denx.de X-Virus-Status: Clean On 9/6/22 09:39, Kunihiko Hayashi wrote: > Add Socionext F_SDH30_E51 IP support. The features of this IP includes > CMD/DAT line delay and force card insertion mode for non-removable cards. > And the IP needs to add some quirks. > > Signed-off-by: Kunihiko Hayashi > --- > drivers/mmc/Kconfig | 4 +-- > drivers/mmc/f_sdh30.c | 64 +++++++++++++++++++++++++++++++++++++++++-- > 2 files changed, 64 insertions(+), 4 deletions(-) > > diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig > index 0dcec8adcee8..c30f20cba5f2 100644 > --- a/drivers/mmc/Kconfig > +++ b/drivers/mmc/Kconfig > @@ -577,12 +577,12 @@ config MMC_SDHCI_IPROC > If unsure, say N. > > config MMC_SDHCI_F_SDH30 > - bool "SDHCI support for Fujitsu Semiconductor F_SDH30" > + bool "SDHCI support for Fujitsu Semiconductor/Socionext F_SDH30" > depends on BLK && DM_MMC > depends on MMC_SDHCI > help > This selects the Secure Digital Host Controller Interface (SDHCI) > - Needed by some Fujitsu SoC for MMC / SD / SDIO support. > + Needed by some Fujitsu/Socionext SoC for MMC / SD / SDIO support. > If you have a controller with this interface, say Y or M here. > If unsure, say N. > > diff --git a/drivers/mmc/f_sdh30.c b/drivers/mmc/f_sdh30.c > index 3a85d9e348ab..6b950edab74e 100644 > --- a/drivers/mmc/f_sdh30.c > +++ b/drivers/mmc/f_sdh30.c > @@ -11,13 +11,46 @@ > #include > #include > > +#define F_SDH30_ESD_CONTROL 0x124 > +#define F_SDH30_CMD_DAT_DELAY BIT(9) > + > +#define F_SDH30_TEST 0x158 > +#define F_SDH30_FORCE_CARD_INSERT BIT(6) > + > +struct f_sdh30_data { > + void (*init)(struct udevice *dev); > + u32 quirks; > +}; > + > struct f_sdh30_plat { > struct mmc_config cfg; > struct mmc mmc; > + > + bool enable_cmd_dat_delay; > + const struct f_sdh30_data *data; > }; > > DECLARE_GLOBAL_DATA_PTR; > > +static void f_sdh30_e51_init(struct udevice *dev) > +{ > + struct f_sdh30_plat *plat = dev_get_plat(dev); > + struct sdhci_host *host = dev_get_priv(dev); > + u32 val; > + > + if (plat->enable_cmd_dat_delay) { > + val = sdhci_readl(host, F_SDH30_ESD_CONTROL); > + val |= F_SDH30_CMD_DAT_DELAY; Is there a case to set its regardless of enable_cmd_dat_delay? how about below? if (plat->enable_cmd_dat_delay) val |= F_SDH30_CMD_DAT_DELAY; else val &= ~F_SDH30_CMD_DAT_DELAY; > + sdhci_writel(host, val, F_SDH30_ESD_CONTROL); > + } > + > + if (plat->cfg.host_caps & MMC_CAP_NONREMOVABLE) { > + val = sdhci_readl(host, F_SDH30_TEST); > + val |= F_SDH30_FORCE_CARD_INSERT; Ditto. > + sdhci_writel(host, val, F_SDH30_TEST); > + } > +} > + > static int f_sdh30_sdhci_probe(struct udevice *dev) > { > struct mmc_uclass_priv *upriv = dev_get_uclass_priv(dev); > @@ -25,6 +58,8 @@ static int f_sdh30_sdhci_probe(struct udevice *dev) > struct sdhci_host *host = dev_get_priv(dev); > int ret; > > + plat->data = (const struct f_sdh30_data *)dev_get_driver_data(dev); > + > ret = mmc_of_parse(dev, &plat->cfg); > if (ret) > return ret; > @@ -33,6 +68,9 @@ static int f_sdh30_sdhci_probe(struct udevice *dev) > host->mmc->dev = dev; > host->mmc->priv = host; > > + if (plat->data && plat->data->quirks) > + host->quirks |= plat->data->quirks; Doesn't need to use "|" ? Best Regards, Jaehoon Chung > + > ret = sdhci_setup_cfg(&plat->cfg, host, 200000000, 400000); > if (ret) > return ret; > @@ -41,18 +79,29 @@ static int f_sdh30_sdhci_probe(struct udevice *dev) > > mmc_set_clock(host->mmc, host->mmc->cfg->f_min, MMC_CLK_ENABLE); > > - return sdhci_probe(dev); > + ret = sdhci_probe(dev); > + if (ret) > + return ret; > + > + if (plat->data && plat->data->init) > + plat->data->init(dev); > + > + return 0; > } > > static int f_sdh30_of_to_plat(struct udevice *dev) > { > struct sdhci_host *host = dev_get_priv(dev); > + struct f_sdh30_plat *plat = dev_get_plat(dev); > > host->name = strdup(dev->name); > host->ioaddr = dev_read_addr_ptr(dev); > host->bus_width = dev_read_u32_default(dev, "bus-width", 4); > host->index = dev_read_u32_default(dev, "index", 0); > > + plat->enable_cmd_dat_delay = > + dev_read_bool(dev, "socionext,enable-cmd-dat-delay"); > + > return 0; > } > > @@ -63,8 +112,19 @@ static int f_sdh30_bind(struct udevice *dev) > return sdhci_bind(dev, &plat->mmc, &plat->cfg); > } > > +static const struct f_sdh30_data f_sdh30_e51_data = { > + .init = f_sdh30_e51_init, > + .quirks = SDHCI_QUIRK_WAIT_SEND_CMD | SDHCI_QUIRK_SUPPORT_SINGLE, > +}; > + > static const struct udevice_id f_sdh30_mmc_ids[] = { > - { .compatible = "fujitsu,mb86s70-sdhci-3.0" }, > + { > + .compatible = "fujitsu,mb86s70-sdhci-3.0", > + }, > + { > + .compatible = "socionext,f-sdh30-e51-mmc", > + .data = (ulong)&f_sdh30_e51_data, > + }, > { } > }; >