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From: Junior <ejr@inbox.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] main clock calculation invalid
Date: Thu, 19 Apr 2007 10:51:51 -0800	[thread overview]
Message-ID: <087DF3B5A22.00000448ejr@inbox.com> (raw)
In-Reply-To: <0721A2B6C14.000002EAejr@inbox.com>

> -----Original Message-----
> From: ejr at inbox.com
> Sent: Thu, 19 Apr 2007 08:16:01 -0800
> To: wd at denx.de
> Subject: Re: [U-Boot-Users] main clock calculation invalid
> 
>> -----Original Message-----
>> From: wd at denx.de
>> Sent: Thu, 19 Apr 2007 17:54:59 +0200
>> To: ejr at inbox.com
>> Subject: Re: [U-Boot-Users] main clock calculation invalid
>> 
>> In message <06D6E1270E8.0000028Aejr@inbox.com> you wrote:
>>> 
>>> I'm trying to figure out why the below calculation of my main
>>> frequencey
>>> clock is not correct.
>>> 
>>> In the below equation:
>>> maindiv2 = 28
>>> maindiv1 = 13
>>> prediv = 23
>>> ps = 0
>>> and CONFIG_SYS_CLK_FREQ is 14745600.
>> 
>> I'm sorry, but the user's manual for my Z80 processor does not contain
>> any part which matches your description.
>> 
>> What might be missing?
> 
> I'm not sure what you're missing but my emphasis was on the calculation.
> This is on an ARM9 LH7A404 chip. Now I might be missing something but
> even on a 16 bit CPU
> the calculation result shouldn't change, no?
> 
> This is the function, all my printed values are correct before the
> calculation.
> 
> /* return FCLK frequency */
> ulong get_FCLK (void)
> {
>     lh7a40x_csc_t* csc = LH7A404_CSC_PTR;
>     ulong maindiv1, maindiv2, prediv, ps;
> 
>     /*
>      * FCLK = ((MAINDIV1 +2) * (MAINDIV2 +2) * 14.7456MHz) /
>      *                   ((PREDIV+2) * (2^PS))
>      */
>     maindiv2 = (csc->clkset & CLKSET_MAINDIV2) >> 11;
>     maindiv1 = (csc->clkset & CLKSET_MAINDIV1) >> 7;
>     prediv = (csc->clkset & CLKSET_PREDIV) >> 2;
>     ps = (csc->clkset & CLKSET_PS) >> 16;
>     printf("maindiv2: %d, maindiv1 %d, prediv %d, ps
> %d\n",maindiv2,maindiv1,prediv,ps);
>     printf("CONFIG_SYS_CLK_FREQ: %d \n",CONFIG_SYS_CLK_FREQ);
>     return ( ((maindiv2 + 2) * (maindiv1 + 2) * CONFIG_SYS_CLK_FREQ) /
> ((prediv + 2) * (1 << ps)));
> }
>


I think I see what the problem is but I'm not sure how to fix it in uboot.
When I multiply 450 and 14745600, I get a number greater than 32 bits and the MSB is missed.

I could do an alternative calculation to achive the correct result but unless there is a good trick out
there I'll do that.

Thanks,
--Jr.

  parent reply	other threads:[~2007-04-19 18:51 UTC|newest]

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-04-19 15:42 [U-Boot-Users] main clock calculation invalid Junior
2007-04-19 15:54 ` Wolfgang Denk
2007-04-19 16:16   ` Junior
2007-04-19 18:14     ` Wolfgang Denk
2007-04-19 18:51     ` Junior [this message]
2007-04-20  7:17       ` Martin Krause
2007-04-20  8:18         ` Wolfgang Denk
2007-04-20  9:18           ` Martin Krause
     [not found] <06d6e1270e8.0000028aejr@inbox.com>

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