From: Michal Simek <michal.simek@amd.com>
To: u-boot@lists.denx.de, git@amd.com
Cc: "Ilias Apalodimas" <ilias.apalodimas@linaro.org>,
"Jonathan Humphreys" <j-humphreys@ti.com>,
"Mattijs Korpershoek" <mkorpershoek@kernel.org>,
"Naman Trivedi" <naman.trivedimanojbhai@amd.com>,
"Neal Frager" <neal.frager@amd.com>,
"Tom Rini" <trini@konsulko.com>,
"Vincent Stehlé" <vincent.stehle@arm.com>
Subject: Re: [PATCH] board: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE
Date: Wed, 15 Apr 2026 15:08:56 +0200 [thread overview]
Message-ID: <0bf1fcf3-1eca-4a82-810b-58f02695f80e@amd.com> (raw)
In-Reply-To: <591134b1c66701fa14a21fecac4f7a772ddba876.1775558062.git.michal.simek@amd.com>
On 4/7/26 12:34, Michal Simek wrote:
> The zu63dr_SE and zu67dr_SE devices share the same silicon ID code
> 0x046D7093 and cannot be distinguished at runtime. The SOC driver
> reports zu67dr_SE for this ID, which causes fpga loadb to reject
> zu63dr_SE bitstreams.
>
> Register zu63dr_SE as an alternate FPGA device when zu67dr_SE is
> detected. This allows users to load either bitstream by selecting
> the appropriate device number:
> - Device 0 (zu67dr_SE): fpga loadb 0 ${loadaddr} ${filesize}
> - Device 1 (zu63dr_SE): fpga loadb 1 ${loadaddr} ${filesize}
>
> Signed-off-by: Michal Simek <michal.simek@amd.com>
> ---
>
> board/xilinx/zynqmp/zynqmp.c | 17 +++++++++++++++++
> 1 file changed, 17 insertions(+)
>
> diff --git a/board/xilinx/zynqmp/zynqmp.c b/board/xilinx/zynqmp/zynqmp.c
> index 769e52bcfb5f..a1d8ae266730 100644
> --- a/board/xilinx/zynqmp/zynqmp.c
> +++ b/board/xilinx/zynqmp/zynqmp.c
> @@ -183,6 +183,23 @@ int board_init(void)
> zynqmppl.name = strdup(name);
> fpga_init();
> fpga_add(fpga_xilinx, &zynqmppl);
> +
> + /*
> + * zu63dr_SE and zu67dr_SE share ID 0x046D7093.
> + * Register zu63dr_SE as alternate device.
> + */
> + if (!strcmp(name, "zu67dr_SE")) {
> + xilinx_desc *alt;
> +
> + alt = calloc(1, sizeof(*alt));
> + if (!alt) {
> + log_err("Failed to allocate alt FPGA descriptor\n");
> + } else {
> + *alt = zynqmppl;
> + alt->name = "zu63dr_SE";
> + fpga_add(fpga_xilinx, alt);
> + }
> + }
> }
> }
> #endif
Applied.
M
prev parent reply other threads:[~2026-04-15 13:09 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-04-07 10:34 [PATCH] board: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE Michal Simek
2026-04-15 13:08 ` Michal Simek [this message]
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