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[108.18.248.138]) by smtp.googlemail.com with ESMTPSA id b126-20020a37b284000000b0069fc13ce1fcsm1313055qkf.45.2022.05.19.06.42.55 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Thu, 19 May 2022 06:42:55 -0700 (PDT) Subject: Re: [PATCH 0/4] stm32mp: add minimal RCC support for STM32MP13 To: Patrick DELAUNAY , u-boot@lists.denx.de Cc: Gabriel FERNANDEZ , Lukasz Majewski , Patrice Chotard , Tom Rini , U-Boot STM32 References: <20220510075114.1238086-1-patrick.delaunay@foss.st.com> <41b170c1-99ba-18ac-4a94-01c90f67b97c@gmail.com> <21688d64-ffeb-d0b7-b6e5-2efeb3f33ec1@foss.st.com> From: Sean Anderson Message-ID: <0c7bf009-9731-d16b-ce8d-08718e6dd7bb@gmail.com> Date: Thu, 19 May 2022 09:42:54 -0400 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.12.0 MIME-Version: 1.0 In-Reply-To: <21688d64-ffeb-d0b7-b6e5-2efeb3f33ec1@foss.st.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Language: en-US Content-Transfer-Encoding: quoted-printable X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.39 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.103.5 at phobos.denx.de X-Virus-Status: Clean Hi Patrick, On 5/17/22 4:12 AM, Patrick DELAUNAY wrote: > Hi, >=20 > On 5/11/22 18:44, Sean Anderson wrote: >> Hi Patrick, >> >> On 5/10/22 3:51 AM, Patrick Delaunay wrote: >>> >>> Add a minimal support for STM32MP13 RCC, the reset and clock controll= er >>> - update of the RCC MISC driver to bind the correct clock and reset d= river >>> - reset driver, same than STM32MP15x =3D drivers/reset/stm32-reset.c >>> - clock driver, add a empty driver for STM32MP13x =3D >>> =C2=A0=C2=A0 drivers/clk/stm32/clk-stm32mp13.c >>> - Add RCC node in SOC device tree with u-boot,dm-pre-reloc property >>> >>> This serie is only a preliminary step for STM32MP13 clock and reset s= upport >>> in U-Boot, based on Linux kernel binding introduced by [1] and it pre= pares >>> the next device tree alignment with Linux kernel. >>> >>> The functional STMP13 clock driver based on CCF and on SCMI clocks >>> provided by OP-TEE and the clock and reset references in SOC device t= ree >>> will be pushed when the associated patches in [1] will be accepted. >>> >>> [1] Introduction of STM32MP13 RCC driver (Reset Clock Controller) >>> https://lore.kernel.org/linux-arm-kernel/20220316131000.9874-1-gabrie= l.fernandez@foss.st.com/ >> >> I'm not really sure what the purpose of this series is. Can you >> elaborate a bit on why we need a dummy clock driver? Why don't >> you just add the binding to the device tree without the associated >> driver? >=20 >=20 > After this serie, the RCC reset part is functional on STM32MP13 (probe = and ops) >=20 > even if the associated binding is not present in device tree. >=20 > tested with: >=20 > ------------------------- arch/arm/dts/stm32mp131.dtsi ----------------= --------- > index fcb0af09b5..d9c6185bcf 100644 > @@ -197,6 +197,7 @@ > =C2=A0=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 interru= pt-names =3D "cmd_irq"; > =C2=A0=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 clocks = =3D <&clk_pll4_p>; > =C2=A0=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 clock-n= ames =3D "apb_pclk"; > +=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 resets =3D <&= rcc 14224>; > =C2=A0=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 cap-sd-= highspeed; > =C2=A0=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 cap-mmc= -highspeed; > =C2=A0=C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 =C2=A0=C2=A0=C2=A0 max-fre= quency =3D <130000000>; >=20 >=20 > A dummy STM32MP13 clock driver is requested to allow RCC MISC and RCC R= ESET >=20 > binding and probe without issue. Shouldn't the solution be to make the clock optional in the user? > This reset support was requested by SDMCC driver and SD-Card boot, befo= re the patch: >=20 > http://patchwork.ozlabs.org/project/uboot/patch/20220506160540.13.I39b6= 9e8dc7b43b8e265e77388fb53f7c1fa2a007@changeid/ >=20 >=20 > As we solve the SDMCC dependency issue (reset become optionnal), so thi= s serie is no more mandatory. >=20 >=20 > This serie is a just a cleanup / preliminary step, but I can drop this = dummy RCC driver if it is disturbing. I would like that, since this is not mandatory. --Sean