Re: [PATCH v3 07/16] remoteproc: k3-dsp: Extend support for C71x DSPs on J784S4 SoCs

[Roger Quadros <rogerq@kernel.org>]

On 08/09/2023 14:05, Apurva Nandan wrote:
> From: Hari Nagalla <hnagalla@ti.com>
> 
> The K3 J784S4 SoCs have four C71x DSP subsystems in MAIN voltage domain
missing period.

SoCs have/SoC has

> The C71x DSPs are 64 bit machine with fixed and floating point DSP> operations. The C71x DSP subsystem is a slighly updated version of the

slighly/slightly

> C71x DSP subsystem on J721e. And, same ip data can be used for J7200,

J721e/J721E
ip/IP

> J721S2 and J784S4.
> 
> Extend support to the C71x DSPs for J784S4 with J721S2 compatible
> string.


> 
> Signed-off-by: Hari Nagalla <hnagalla@ti.com>
> Signed-off-by: Apurva Nandan <a-nandan@ti.com>
> ---
>  drivers/remoteproc/ti_k3_dsp_rproc.c | 4 +++-
>  1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/remoteproc/ti_k3_dsp_rproc.c b/drivers/remoteproc/ti_k3_dsp_rproc.c
> index 1a2e9dd1f5..d856e31db8 100644
> --- a/drivers/remoteproc/ti_k3_dsp_rproc.c
> +++ b/drivers/remoteproc/ti_k3_dsp_rproc.c
> @@ -327,7 +327,8 @@ static int k3_dsp_of_get_memories(struct udevice *dev)
>  
>  	for (i = 0; i < dsp->num_mems; i++) {
>  		/* C71 cores only have a L1P Cache, there are no L1P SRAMs */
> -		if (device_is_compatible(dev, "ti,j721e-c71-dsp") &&
> +		if (((device_is_compatible(dev, "ti,j721e-c71-dsp")) ||
> +		     (device_is_compatible(dev, "ti,j721s2-c71-dsp"))) &&
>  		    !strcmp(mem_names[i], "l1pram")) {
>  			dsp->mem[i].bus_addr = FDT_ADDR_T_NONE;
>  			dsp->mem[i].dev_addr = FDT_ADDR_T_NONE;
> @@ -446,6 +447,7 @@ static const struct k3_dsp_boot_data c71_data = {
>  static const struct udevice_id k3_dsp_ids[] = {
>  	{ .compatible = "ti,j721e-c66-dsp", .data = (ulong)&c66_data, },
>  	{ .compatible = "ti,j721e-c71-dsp", .data = (ulong)&c71_data, },
> +	{ .compatible = "ti,j721s2-c71-dsp", .data = (ulong)&c71_data, },
>  	{}
>  };
>  

-- 
cheers,
-roger