From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kever Yang Date: Tue, 28 Apr 2020 22:13:11 +0800 Subject: [PATCH v2 3/6] clk: rk3399: Set empty for HCLK_SD assigned-clocks In-Reply-To: <20200428100019.19155-4-jagan@amarulasolutions.com> References: <20200428100019.19155-1-jagan@amarulasolutions.com> <20200428100019.19155-4-jagan@amarulasolutions.com> Message-ID: <103a67c7-ecff-e902-e363-147ffcc57252@rock-chips.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On 2020/4/28 ??6:00, Jagan Teki wrote: > Due to v5.7-rc1 sync the SD controller nodes in rk3399.dtsi > have HCLK_SD assigned-clocks which are usually required for > Linux and don't require to handle them in U-Boot. > > assigned-clocks = <&cru HCLK_SD>; > > So, mark them as empty in clock otherwise device probe on > those SD controllers would fail. > > Signed-off-by: Jagan Teki Reviewed-by: Kever Yang Thanks, - Kever > --- > Changes for v2: > - none > > drivers/clk/rockchip/clk_rk3399.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/clk/rockchip/clk_rk3399.c b/drivers/clk/rockchip/clk_rk3399.c > index 1f62376595..d822acace1 100644 > --- a/drivers/clk/rockchip/clk_rk3399.c > +++ b/drivers/clk/rockchip/clk_rk3399.c > @@ -996,6 +996,7 @@ static ulong rk3399_clk_set_rate(struct clk *clk, ulong rate) > break; > case ACLK_VOP1: > case HCLK_VOP1: > + case HCLK_SD: > /** > * assigned-clocks handling won't require for vopl, so > * return 0 to satisfy clk_set_defaults during device probe.