Re: Reading QSPI on zynq7 broken since commit 9bb02f7f4533

[Mike Looijmans <mike.looijmans@topic.nl>]

Met vriendelijke groet / kind regards,

Mike Looijmans
System Expert


TOPIC Embedded Products B.V.
Materiaalweg 4, 5681 RJ Best
The Netherlands

T: +31 (0) 499 33 69 69
E: mike.looijmans@topic.nl
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On 12-03-2025 05:05, Abbarapu, Venkatesh wrote:
> [AMD Official Use Only - AMD Internal Distribution Only]
?
> Hi Mike,
> Can you try disabling the config SPI_STACKED_PARALLEL.

That's already disabled, the board only has a single QSPI flash chip.


> Is read getting failed?

Fails in SPL, it gets an EIO error when it tries to read the u-boot.img from 
QSPI flash at offset 0x20000. Not much I can do then, since that causes a panic.

Simply reverting the aforementioned commit fixes the issue.


> Thanks
> Venkatesh
>
>> -----Original Message-----
>> From: Mike Looijmans <mike.looijmans@topic.nl>
>> Sent: Tuesday, March 11, 2025 3:08 PM
>> To: u-boot@lists.denx.de
>> Cc: Abbarapu, Venkatesh <venkatesh.abbarapu@amd.com>; Simek, Michal
>> <michal.simek@amd.com>
>> Subject: Reading QSPI on zynq7 broken since commit 9bb02f7f4533
>>
>> After a bisect session, turned out this causes my topic-miami board to fail to boot
>> from QSPI:
>>
>> Commit 9bb02f7f4533: "mtd: spi-nor: Fix the spi_nor_read() when config
>> SPI_STACKED_PARALLEL is enabled"
>>
>> I haven't determined yet what the bug is exactly. The board has a single QSPI chip
>> attached to a 7-series Zynq. SPL fails to read from it since this commit.
>>
>>
>>