[U-Boot-Users] CFI driver

[York Sun <yorksun@freescale.com>]

Yuli,

I have confirm the problem on more boards.

On Mon, 2004-10-25 at 11:53, Yuli Barcohen wrote:
>     York> Yes. I agree. I polled the DQ7 at the same address of being
>     York> written. I know the AMD polling algorithm. Actually I have
>     York> been using polling DQ7 for a long time. Hundreds of our boards
>     York> were shipped with this algorithm. I am very sure the image has
>     York> been programmed correctly.
> 
> So I assume that if you program kernel image you can then successfully
> boot it. Correct?
Yes.

>     York> I also found the flash_make_cmd has some defect. You cannot
>     York> simply multiply the offset with the port width. That would
>     York> generate error address if you are using 8-bit port
>     York> width. Modification is needed for 32-bit chip width. I made
>     York> modification. But I need some boards to verify.
> 
> There can be bugs for the very same reason: I haven't got enough boards
> to verify all possible configuration. In particular, I've got no board
> using 8-bit port width. I received recently a board with 32-bit flash
> (2x16) and the CFI driver worked unchanged. Maybe only 4x8 needed the
> modification...
> 

> I'd suggest trying this driver on a different board with the same flash
> if you've got one. This would rule out possible hardware issue. On my
> Adder, the driver works so I can't reproduce the problem in our lab.
I tried 4 more boards.
I confirm the problem on one board with the same two flash chips
(AM29LV641DH). I also found two boards with mixed chips (one AM29LV641MH
and AM29LV641DH). One of those board has problem on erasing, no problem
on programming. The other board is fine. 

The problem did show up on the board with two AM29LV641MH. 

I have revised the driver to support port width from 8-bit to 64-bit,
chip width from 8-bit to 32-bit. Also, I modified the driver to poll DQ6
at the same address where the date is being written to. And I add the
polling DQ7, which is not enabled by default. With these modification,
all my boards passed testing.

By the way, here is the feedback from AMD, "It is a good practice to use
the exact address where data is being written to when using the "DQ6"
method, even though in theory you don't have to."

If you want to confirm, I can generate a patch. Wolfgang?

Regards,

York