From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ben Warren Date: Tue, 18 Apr 2006 10:07:35 -0400 Subject: [U-Boot-Users] u-boot 834x spd_ram In-Reply-To: <4444F16B.4030606@smiths-aerospace.com> References: <4444F16B.4030606@smiths-aerospace.com> Message-ID: <1145369255.972.305.camel@saruman.qstreams.net> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Jerry, The 83xx chips have a separate memory bus for DDR, with its own chip selects. For these chips, you do in fact need to use the local bus CS0 for your boot flash/EEPROM. I can't find anything in the manual that differentiates between the DDR chip selects, so using CS2/3 was probably just a design choice. regards, Ben On Tue, 2006-04-18 at 10:02 -0400, Jerry Van Baren wrote: > Aziz Mzili wrote: > > > > Hi > > > > I'm wondering why in cpu/83xx/spd_ram.c we expect the DDR ram to be on > > cs2 and cs3. Is there any issue with it on cs0 and cs1 ? > > > > thank you > > > > Aziz Mzili > > I'm not a 834x expert, but all my experience is that CS0 is used to boot > the processor. If it is DDR RAM rather than flash, someone other than > the 834x must initialize the DDR RAM and load it with the boot program. > That is possible, but very uncommon. > > gvb > > > ------------------------------------------------------- > This SF.Net email is sponsored by xPML, a groundbreaking scripting language > that extends applications into web and mobile media. Attend the live webcast > and join the prime developer group breaking into this new coding territory! > http://sel.as-us.falkag.net/sel?cmd=lnk&kid=110944&bid=241720&dat=121642 > _______________________________________________ > U-Boot-Users mailing list > U-Boot-Users at lists.sourceforge.net > https://lists.sourceforge.net/lists/listinfo/u-boot-users -------------- next part -------------- An HTML attachment was scrubbed... URL: http://lists.denx.de/pipermail/u-boot/attachments/20060418/a8733983/attachment.htm