From mboxrd@z Thu Jan 1 00:00:00 1970 From: timur at freescale.com Date: Mon, 6 Nov 2006 17:46:52 -0600 Subject: [U-Boot-Users] [PATCH] Where does U-Boot's CFI driver check for top/bottom boot? Message-ID: <11628568123033-git-send-email-timur@freescale.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de From: Timur Tabi This patch adds support for the reversed geometry data in some AMD flash chips. I'm not proud of this patch, so I'm posting it for review only. I know it works on the my board that was the problem, but I have no idea if it will break any other board. I'm sure this code could be improved a lot. Signed-off-by: Timur Tabi --- drivers/cfi_flash.c | 10 +++++++++- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/drivers/cfi_flash.c b/drivers/cfi_flash.c index fd0a186..8cc8d60 100644 --- a/drivers/cfi_flash.c +++ b/drivers/cfi_flash.c @@ -1120,6 +1120,7 @@ ulong flash_get_size (ulong base, int ba uchar num_erase_regions; int erase_region_size; int erase_region_count; + int geometry_reversed = 0; #ifdef CFG_FLASH_PROTECTION int ext_addr; info->legacy_unlock = 0; @@ -1148,6 +1149,8 @@ #endif case CFI_CMDSET_AMD_STANDARD: case CFI_CMDSET_AMD_EXTENDED: info->cmd_reset = AMD_CMD_RESET; + if (flash_read_uchar(info, FLASH_OFFSET_CFI_RESP + (0x7E / info->portwidth)) == 3) + geometry_reversed = 1; break; } @@ -1171,8 +1174,13 @@ #endif num_erase_regions, NUM_ERASE_REGIONS); break; } - tmp = flash_read_long (info, 0, + if (geometry_reversed) + tmp = flash_read_long (info, 0, FLASH_OFFSET_ERASE_REGIONS + + (num_erase_regions - 1 - i) * 4); + else + tmp = flash_read_long (info, 0, + FLASH_OFFSET_ERASE_REGIONS + i * 4); erase_region_size = (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128; -- 1.4.2.1