* [U-Boot-Users] ARM9: Reset hw/reg @0xfffece10?
@ 2007-06-29 11:21 Josef Meser
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From: Josef Meser @ 2007-06-29 11:21 UTC (permalink / raw)
To: u-boot
Hi,
I am working on an u-boot port for an ARM926EJ-S based SOC (SVENm).
Implementing the 'reset' cmd I tried to understand what other
ARM9 CPUs do there.
There is some similar code for reset_cpu() in:
cpu/arm925t/start.S:422: ldr r1, rstctl1 /* get clkm1 reset ctl */
cpu/arm926ejs/omap/reset.S:36: ldr r1, rstctl1 /* get clkm1 reset ctl */
cpu/arm926ejs/versatile/reset.S:36: ldr r1, rstctl1 /* get clkm1 reset ctl */
cpu/arm946es/start.S:398: ldr r1, rstctl1 /* get clkm1 reset ctl */
which all refers to
rstctl1:
.word 0xfffece10
I looked in various docs (Versatile, ARM926, ...), but did not find any
reference to hw at 0xfffece10.
Could anyone please point me to a document which describes the hw/reg
found there?
Regards,
Josef
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