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From: Timur Tabi <timur@freescale.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] [PATCH] Update SCCR programming in cpu_init_f() to support all 83xx processors
Date: Tue,  3 Jul 2007 13:04:34 -0500	[thread overview]
Message-ID: <11834858741534-git-send-email-timur@freescale.com> (raw)

Update the cpu_init_f() function in cpu/mpc83xx/cpu_init.c to program the
bitfields for all 83xx processors.  The code to update some bitfields was
compiled only on some processors.  Now, the bitfields are programmed as long
as the corresponding CFG_SCCR option is defined in the board header file.
This means that the board header file should not define any CFG_SCCR macros
for bitfields that don't exist on that processor, otherwise the SCCR will be
programmed incorrectly.

Signed-off-by: Timur Tabi <timur@freescale.com>
---
 cpu/mpc83xx/cpu_init.c |   14 ++++++++++++--
 include/mpc83xx.h      |    2 ++
 2 files changed, 14 insertions(+), 2 deletions(-)

diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c
index 3ac9161..53a5f59 100644
--- a/cpu/mpc83xx/cpu_init.c
+++ b/cpu/mpc83xx/cpu_init.c
@@ -83,20 +83,30 @@ void cpu_init_f (volatile immap_t * im)
 	im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSEC2EP) | (CFG_SPCR_TSEC2EP << SPCR_TSEC2EP_SHIFT);
 #endif
 
-#ifdef CONFIG_MPC834X
 #ifdef CFG_SCCR_TSEC1CM
 	/* TSEC1 clock mode */
 	im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1CM) | (CFG_SCCR_TSEC1CM << SCCR_TSEC1CM_SHIFT);
 #endif
+
 #ifdef CFG_SCCR_TSEC2CM
 	/* TSEC2 & I2C1 clock mode */
 	im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2CM) | (CFG_SCCR_TSEC2CM << SCCR_TSEC2CM_SHIFT);
 #endif
+
+#ifdef CFG_SCCR_TSEC1ON
+	/* TSEC1 clock switch */
+	im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC1ON) | (CFG_SCCR_TSEC1ON << SCCR_TSEC1ON_SHIFT);
+#endif
+
+#ifdef CFG_SCCR_TSEC2ON
+	/* TSEC2 clock switch */
+	im->clk.sccr = (im->clk.sccr & ~SCCR_TSEC2ON) | (CFG_SCCR_TSEC2ON << SCCR_TSEC2ON_SHIFT);
+#endif
+
 #ifdef CFG_SCCR_USBMPHCM
 	/* USB MPH clock mode */
 	im->clk.sccr = (im->clk.sccr & ~SCCR_USBMPHCM) | (CFG_SCCR_USBMPHCM << SCCR_USBMPHCM_SHIFT);
 #endif
-#endif /* CONFIG_MPC834X */
 
 #ifdef CFG_SCCR_PCICM
 	/* PCI & DMA clock mode */
diff --git a/include/mpc83xx.h b/include/mpc83xx.h
index 336c0ac..9d40eae 100644
--- a/include/mpc83xx.h
+++ b/include/mpc83xx.h
@@ -600,7 +600,9 @@
 #define SCCR_TSEC1CM_3			0xC0000000
 
 #define SCCR_TSEC1ON			0x20000000
+#define SCCR_TSEC1ON_SHIFT		29
 #define SCCR_TSEC2ON			0x10000000
+#define SCCR_TSEC2ON_SHIFT		28
 
 #endif
 
-- 
1.5.0.2.260.g2eb065

                 reply	other threads:[~2007-07-03 18:04 UTC|newest]

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