From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dave Liu Date: Sat, 04 Aug 2007 13:34:01 +0800 Subject: [U-Boot-Users] [PATCH] mpc83xx: Correct the burst length for DDR2 with 32 bits In-Reply-To: <1185948086.3774.4.camel@localhost.localdomain> References: <1185948086.3774.4.camel@localhost.localdomain> Message-ID: <1186205641.3718.4.camel@localhost.localdomain> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Sorry for that, the patch only fix bottom half. I will resend the new patch. Thanks, Dave On Wed, 2007-08-01 at 14:01 +0800, Dave Liu wrote: > The burst length should be 4 for DDR2 with 32 bits bus > > Signed-off-by: Dave Liu > --- > cpu/mpc83xx/spd_sdram.c | 8 ++++++-- > 1 files changed, 6 insertions(+), 2 deletions(-) > > diff --git a/cpu/mpc83xx/spd_sdram.c b/cpu/mpc83xx/spd_sdram.c > index 647813f..5e89add 100644 > --- a/cpu/mpc83xx/spd_sdram.c > +++ b/cpu/mpc83xx/spd_sdram.c > @@ -730,8 +730,12 @@ long int spd_sdram() > sdram_cfg |= 0x10000000; > > /* The DIMM is 32bit width */ > - if (spd.dataw_lsb == 0x20) > - sdram_cfg |= 0x000C0000; > + if (spd.dataw_lsb == 0x20) { > + if (spd.mem_type == SPD_MEMTYPE_DDR) > + sdram_cfg |= 0x000C0000; > + if (spd.mem_type == SPD_MEMTYPE_DDR2) > + sdram_cfg |= 0x00080000; > + } > > ddrc_ecc_enable = 0; >