* [U-Boot-Users] [PATCH] Improve configuration of FPGA subsystem
@ 2007-11-12 17:18 Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add pre and post configuration callbacks for Spartan FPGAs Matthias Fuchs
` (3 more replies)
0 siblings, 4 replies; 5+ messages in thread
From: Matthias Fuchs @ 2007-11-12 17:18 UTC (permalink / raw)
To: u-boot
This patch removes the FPGA subsystem configuration through
the CONFIG_FPGA bitmask configuration option.
See README for the new options:
CONFIG_FPGA,
CONFIG_FPGA_<vendor>,
CONFIG_FPGA_<family>
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
---
README | 19 ++++++++++++++-----
board/gen860t/fpga.c | 2 +-
board/gen860t/gen860t.c | 2 +-
common/ACEX1K.c | 4 ++--
common/altera.c | 18 +++++++++---------
common/cmd_fpga.c | 2 +-
common/cyclon2.c | 4 ++--
common/fpga.c | 30 +++++++++++-------------------
common/spartan2.c | 2 +-
common/spartan3.c | 2 +-
common/virtex2.c | 2 +-
common/xilinx.c | 28 ++++++++++++++--------------
include/configs/GEN860T.h | 4 +++-
include/configs/M54455EVB.h | 4 +++-
include/configs/alpr.h | 4 +++-
include/xilinx.h | 4 ++--
16 files changed, 69 insertions(+), 62 deletions(-)
diff --git a/README b/README
index 3dad5fc..a33ced7 100644
--- a/README
+++ b/README
@@ -1379,14 +1379,23 @@ The following options need to be configured:
SPI configuration items (port pins to use, etc). For
an example, see include/configs/sacsng.h.
-- FPGA Support: CONFIG_FPGA_COUNT
+- FPGA Support: CONFIG_FPGA
- Specify the number of FPGA devices to support.
+ Enables FPGA subsystem.
+
+ CONFIG_FPGA_<vendor>
+
+ Enables support for specific chip vendors.
+ (ALTERA, XILINX)
- CONFIG_FPGA
+ CONFIG_FPGA_<family>
- Used to specify the types of FPGA devices. For example,
- #define CONFIG_FPGA CFG_XILINX_VIRTEX2
+ Enables support for FPGA family.
+ (SPARTAN2, SPARTAN3, VIRTEX2, CYCLONE2, ACEX1K, ACEX)
+
+ CONFIG_FPGA_COUNT
+
+ Specify the number of FPGA devices to support.
CFG_FPGA_PROG_FEEDBACK
diff --git a/board/gen860t/fpga.c b/board/gen860t/fpga.c
index 2ba7e0e..3816e52 100644
--- a/board/gen860t/fpga.c
+++ b/board/gen860t/fpga.c
@@ -34,7 +34,7 @@
DECLARE_GLOBAL_DATA_PTR;
-#if (CONFIG_FPGA)
+#if defined(CONFIG_FPGA)
#if 0
#define GEN860T_FPGA_DEBUG
diff --git a/board/gen860t/gen860t.c b/board/gen860t/gen860t.c
index d448f9f..73cc16d 100644
--- a/board/gen860t/gen860t.c
+++ b/board/gen860t/gen860t.c
@@ -254,7 +254,7 @@ int misc_init_r (void)
mii_init ();
#endif
-#if (CONFIG_FPGA)
+#if defined(CONFIG_FPGA)
gen860t_init_fpga ();
#endif
return 0;
diff --git a/common/ACEX1K.c b/common/ACEX1K.c
index 2a421e2..76dc166 100644
--- a/common/ACEX1K.c
+++ b/common/ACEX1K.c
@@ -28,7 +28,7 @@
#include <common.h> /* core U-Boot definitions */
#include <ACEX1K.h> /* ACEX device family */
-#if (CONFIG_FPGA & (CFG_ALTERA | CFG_ACEX1K))
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_ACEX1K)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
@@ -363,4 +363,4 @@ static int ACEX1K_ps_reloc (Altera_desc * desc, ulong reloc_offset)
}
-#endif /* (CONFIG_FPGA & (CFG_ALTERA | CFG_ACEX1K)) */
+#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_ACEX1K */
diff --git a/common/altera.c b/common/altera.c
index 06e8a95..0df7bae 100644
--- a/common/altera.c
+++ b/common/altera.c
@@ -40,7 +40,7 @@
#define PRINTF(fmt,args...)
#endif
-#if (CONFIG_FPGA & CFG_FPGA_ALTERA)
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA)
/* Local Static Functions */
static int altera_validate (Altera_desc * desc, char *fn);
@@ -56,11 +56,11 @@ int altera_load( Altera_desc *desc, void *buf, size_t bsize )
switch (desc->family) {
case Altera_ACEX1K:
case Altera_CYC2:
-#if (CONFIG_FPGA & CFG_ACEX1K)
+#if defined(CONFIG_FPGA_ACEX1K)
PRINTF ("%s: Launching the ACEX1K Loader...\n",
__FUNCTION__);
ret_val = ACEX1K_load (desc, buf, bsize);
-#elif (CONFIG_FPGA & CFG_CYCLON2)
+#elif defined CONFIG_FPGA_CYCLON2
PRINTF ("%s: Launching the CYCLON II Loader...\n",
__FUNCTION__);
ret_val = CYC2_load (desc, buf, bsize);
@@ -88,7 +88,7 @@ int altera_dump( Altera_desc *desc, void *buf, size_t bsize )
} else {
switch (desc->family) {
case Altera_ACEX1K:
-#if (CONFIG_FPGA & CFG_ACEX)
+#if defined(CONFIG_FPGA_ACEX)
PRINTF ("%s: Launching the ACEX1K Reader...\n",
__FUNCTION__);
ret_val = ACEX1K_dump (desc, buf, bsize);
@@ -156,9 +156,9 @@ int altera_info( Altera_desc *desc )
switch (desc->family) {
case Altera_ACEX1K:
case Altera_CYC2:
-#if (CONFIG_FPGA & CFG_ACEX1K)
+#if defined(CONFIG_FPGA_ACEX1K)
ACEX1K_info (desc);
-#elif (CONFIG_FPGA & CFG_CYCLON2)
+#elif defined(CONFIG_FPGA_CYCLON2)
CYC2_info (desc);
#else
/* just in case */
@@ -192,7 +192,7 @@ int altera_reloc( Altera_desc *desc, ulong reloc_offset)
} else {
switch (desc->family) {
case Altera_ACEX1K:
-#if (CONFIG_FPGA & CFG_ACEX1K)
+#if defined(CONFIG_FPGA_ACEX1K)
ret_val = ACEX1K_reloc (desc, reloc_offset);
#else
printf ("%s: No support for ACEX devices.\n",
@@ -200,7 +200,7 @@ int altera_reloc( Altera_desc *desc, ulong reloc_offset)
#endif
break;
case Altera_CYC2:
-#if (CONFIG_FPGA & CFG_CYCLON2)
+#if defined(CONFIG_FPGA_CYCLON2)
ret_val = CYC2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for CYCLON II devices.\n",
@@ -249,4 +249,4 @@ static int altera_validate (Altera_desc * desc, char *fn)
/* ------------------------------------------------------------------------- */
-#endif /* CONFIG_FPGA & CFG_FPGA_ALTERA */
+#endif /* CONFIG_FPGA & CONFIG_FPGA_ALTERA */
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index cce23ad..3affeba 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -60,7 +60,7 @@ static int fpga_get_op (char *opstr);
/* Convert bitstream data and load into the fpga */
int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
{
-#if (CONFIG_FPGA & CFG_FPGA_XILINX)
+#if defined(CONFIG_FPGA_XILINX)
unsigned int length;
unsigned char* swapdata;
unsigned int swapsize;
diff --git a/common/cyclon2.c b/common/cyclon2.c
index dce13b5..06f5e8a 100644
--- a/common/cyclon2.c
+++ b/common/cyclon2.c
@@ -27,7 +27,7 @@
#include <altera.h>
#include <ACEX1K.h> /* ACEX device family */
-#if (CONFIG_FPGA & (CFG_ALTERA | CFG_CYCLON2))
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_ALTERA) && defined(CONFIG_FPGA_CYCLON2)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
@@ -302,4 +302,4 @@ static int CYC2_ps_reloc (Altera_desc * desc, ulong reloc_offset)
return ret_val;
}
-#endif /* (CONFIG_FPGA & (CFG_ALTERA | CFG_CYCLON2)) */
+#endif /* CONFIG_FPGA && CONFIG_FPGA_ALTERA && CONFIG_FPGA_CYCLON2 */
diff --git a/common/fpga.c b/common/fpga.c
index 2eff239..d8b6ae3 100644
--- a/common/fpga.c
+++ b/common/fpga.c
@@ -67,14 +67,11 @@ static int fpga_dev_info( int devnum );
static void fpga_no_sup( char *fn, char *msg )
{
if ( fn && msg ) {
- printf( "%s: No support for %s. CONFIG_FPGA defined as 0x%x.\n",
- fn, msg, CONFIG_FPGA );
+ printf( "%s: No support for %s.\n", fn, msg);
} else if ( msg ) {
- printf( "No support for %s. CONFIG_FPGA defined as 0x%x.\n",
- msg, CONFIG_FPGA );
+ printf( "No support for %s.\n", msg);
} else {
- printf( "No FPGA suport! CONFIG_FPGA defined as 0x%x.\n",
- CONFIG_FPGA );
+ printf( "No FPGA suport!\n");
}
}
@@ -112,11 +109,6 @@ static __attribute__((__const__)) fpga_desc * __attribute__((__const__)) fpga_va
printf( "%s: Null buffer.\n", fn );
return (fpga_desc * const)NULL;
}
- if ( !bsize ) {
- printf( "%s: Null buffer size.\n", fn );
- return (fpga_desc * const)NULL;
- }
-
return desc;
}
@@ -135,7 +127,7 @@ static int fpga_dev_info( int devnum )
switch ( desc->devtype ) {
case fpga_xilinx:
-#if CONFIG_FPGA & CFG_FPGA_XILINX
+#if defined(CONFIG_FPGA_XILINX)
printf( "Xilinx Device\nDescriptor @ 0x%p\n", desc );
ret_val = xilinx_info( desc->devdesc );
#else
@@ -143,7 +135,7 @@ static int fpga_dev_info( int devnum )
#endif
break;
case fpga_altera:
-#if CONFIG_FPGA & CFG_FPGA_ALTERA
+#if defined(CONFIG_FPGA_ALTERA)
printf( "Altera Device\nDescriptor @ 0x%p\n", desc );
ret_val = altera_info( desc->devdesc );
#else
@@ -175,14 +167,14 @@ int fpga_reloc( fpga_type devtype, void *desc, ulong reloc_off )
switch ( devtype ) {
case fpga_xilinx:
-#if CONFIG_FPGA & CFG_FPGA_XILINX
+#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_reloc( desc, reloc_off );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
-#if CONFIG_FPGA & CFG_FPGA_ALTERA
+#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_reloc( desc, reloc_off );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
@@ -268,14 +260,14 @@ int fpga_load( int devnum, void *buf, size_t bsize )
if ( desc ) {
switch ( desc->devtype ) {
case fpga_xilinx:
-#if CONFIG_FPGA & CFG_FPGA_XILINX
+#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_load( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
-#if CONFIG_FPGA & CFG_FPGA_ALTERA
+#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_load( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
@@ -301,14 +293,14 @@ int fpga_dump( int devnum, void *buf, size_t bsize )
if ( desc ) {
switch ( desc->devtype ) {
case fpga_xilinx:
-#if CONFIG_FPGA & CFG_FPGA_XILINX
+#if defined(CONFIG_FPGA_XILINX)
ret_val = xilinx_dump( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Xilinx devices" );
#endif
break;
case fpga_altera:
-#if CONFIG_FPGA & CFG_FPGA_ALTERA
+#if defined(CONFIG_FPGA_ALTERA)
ret_val = altera_dump( desc->devdesc, buf, bsize );
#else
fpga_no_sup( (char *)__FUNCTION__, "Altera devices" );
diff --git a/common/spartan2.c b/common/spartan2.c
index 0fb23b6..0181c35 100644
--- a/common/spartan2.c
+++ b/common/spartan2.c
@@ -25,7 +25,7 @@
#include <common.h> /* core U-Boot definitions */
#include <spartan2.h> /* Spartan-II device family */
-#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN2))
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN2)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
diff --git a/common/spartan3.c b/common/spartan3.c
index c0f2b05..4bf76a0 100644
--- a/common/spartan3.c
+++ b/common/spartan3.c
@@ -30,7 +30,7 @@
#include <common.h> /* core U-Boot definitions */
#include <spartan3.h> /* Spartan-II device family */
-#if (CONFIG_FPGA & (CFG_XILINX | CFG_SPARTAN3))
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_SPARTAN3)
/* Define FPGA_DEBUG to get debug printf's */
#ifdef FPGA_DEBUG
diff --git a/common/virtex2.c b/common/virtex2.c
index b5dc366..1283ff6 100644
--- a/common/virtex2.c
+++ b/common/virtex2.c
@@ -31,7 +31,7 @@
#include <common.h>
#include <virtex2.h>
-#if (CONFIG_FPGA & (CFG_XILINX | CFG_VIRTEX2))
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_VIRTEX2)
#if 0
#define FPGA_DEBUG
diff --git a/common/xilinx.c b/common/xilinx.c
index e03e78c..c898238 100644
--- a/common/xilinx.c
+++ b/common/xilinx.c
@@ -32,7 +32,7 @@
#include <spartan2.h>
#include <spartan3.h>
-#if (CONFIG_FPGA & CFG_FPGA_XILINX)
+#if defined(CONFIG_FPGA) && defined(CONFIG_FPGA_XILINX)
#if 0
#define FPGA_DEBUG
@@ -59,7 +59,7 @@ int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
} else
switch (desc->family) {
case Xilinx_Spartan2:
-#if (CONFIG_FPGA & CFG_SPARTAN2)
+#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Loader...\n",
__FUNCTION__);
ret_val = Spartan2_load (desc, buf, bsize);
@@ -69,7 +69,7 @@ int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Spartan3:
-#if (CONFIG_FPGA & CFG_SPARTAN3)
+#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Loader...\n",
__FUNCTION__);
ret_val = Spartan3_load (desc, buf, bsize);
@@ -79,7 +79,7 @@ int xilinx_load (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Virtex2:
-#if (CONFIG_FPGA & CFG_VIRTEX2)
+#if defined(CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Loader...\n",
__FUNCTION__);
ret_val = Virtex2_load (desc, buf, bsize);
@@ -106,7 +106,7 @@ int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
} else
switch (desc->family) {
case Xilinx_Spartan2:
-#if (CONFIG_FPGA & CFG_SPARTAN2)
+#if defined(CONFIG_FPGA_SPARTAN2)
PRINTF ("%s: Launching the Spartan-II Reader...\n",
__FUNCTION__);
ret_val = Spartan2_dump (desc, buf, bsize);
@@ -116,7 +116,7 @@ int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Spartan3:
-#if (CONFIG_FPGA & CFG_SPARTAN3)
+#if defined(CONFIG_FPGA_SPARTAN3)
PRINTF ("%s: Launching the Spartan-III Reader...\n",
__FUNCTION__);
ret_val = Spartan3_dump (desc, buf, bsize);
@@ -126,7 +126,7 @@ int xilinx_dump (Xilinx_desc * desc, void *buf, size_t bsize)
#endif
break;
case Xilinx_Virtex2:
-#if (CONFIG_FPGA & CFG_VIRTEX2)
+#if defined( CONFIG_FPGA_VIRTEX2)
PRINTF ("%s: Launching the Virtex-II Reader...\n",
__FUNCTION__);
ret_val = Virtex2_dump (desc, buf, bsize);
@@ -198,7 +198,7 @@ int xilinx_info (Xilinx_desc * desc)
printf ("Device Function Table @ 0x%p\n", desc->iface_fns);
switch (desc->family) {
case Xilinx_Spartan2:
-#if (CONFIG_FPGA & CFG_SPARTAN2)
+#if defined(CONFIG_FPGA_SPARTAN2)
Spartan2_info (desc);
#else
/* just in case */
@@ -207,7 +207,7 @@ int xilinx_info (Xilinx_desc * desc)
#endif
break;
case Xilinx_Spartan3:
-#if (CONFIG_FPGA & CFG_SPARTAN3)
+#if defined(CONFIG_FPGA_SPARTAN3)
Spartan3_info (desc);
#else
/* just in case */
@@ -216,7 +216,7 @@ int xilinx_info (Xilinx_desc * desc)
#endif
break;
case Xilinx_Virtex2:
-#if (CONFIG_FPGA & CFG_VIRTEX2)
+#if defined(CONFIG_FPGA_VIRTEX2)
Virtex2_info (desc);
#else
/* just in case */
@@ -249,7 +249,7 @@ int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
} else
switch (desc->family) {
case Xilinx_Spartan2:
-#if (CONFIG_FPGA & CFG_SPARTAN2)
+#if defined(CONFIG_FPGA_SPARTAN2)
ret_val = Spartan2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Spartan-II devices.\n",
@@ -257,7 +257,7 @@ int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
#endif
break;
case Xilinx_Spartan3:
-#if (CONFIG_FPGA & CFG_SPARTAN3)
+#if defined(CONFIG_FPGA_SPARTAN3)
ret_val = Spartan3_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Spartan-III devices.\n",
@@ -265,7 +265,7 @@ int xilinx_reloc (Xilinx_desc * desc, ulong reloc_offset)
#endif
break;
case Xilinx_Virtex2:
-#if (CONFIG_FPGA & CFG_VIRTEX2)
+#if defined(CONFIG_FPGA_VIRTEX2)
ret_val = Virtex2_reloc (desc, reloc_offset);
#else
printf ("%s: No support for Virtex-II devices.\n",
@@ -308,4 +308,4 @@ static int xilinx_validate (Xilinx_desc * desc, char *fn)
return ret_val;
}
-#endif /* CONFIG_FPGA & CFG_FPGA_XILINX */
+#endif /* CONFIG_FPGA && CONFIG_FPGA_XILINX */
diff --git a/include/configs/GEN860T.h b/include/configs/GEN860T.h
index bfbf3a8..3eb3131 100644
--- a/include/configs/GEN860T.h
+++ b/include/configs/GEN860T.h
@@ -273,7 +273,9 @@
* Virtex2 FPGA configuration support
*/
#define CONFIG_FPGA_COUNT 1
-#define CONFIG_FPGA CFG_XILINX_VIRTEX2
+#define CONFIG_FPGA
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_VIRTEX2
#define CFG_FPGA_PROG_FEEDBACK
diff --git a/include/configs/M54455EVB.h b/include/configs/M54455EVB.h
index db30958..35637f9 100644
--- a/include/configs/M54455EVB.h
+++ b/include/configs/M54455EVB.h
@@ -192,7 +192,9 @@
/* FPGA - Spartan 2 */
/* experiment
-#define CONFIG_FPGA CFG_SPARTAN3
+#define CONFIG_FPGA
+#define CONFIG_FPGA_XILINX
+#define CONFIG_FPGA_SPARTAN3
#define CONFIG_FPGA_COUNT 1
#define CFG_FPGA_PROG_FEEDBACK
#define CFG_FPGA_CHECK_CTRLC
diff --git a/include/configs/alpr.h b/include/configs/alpr.h
index d88c3ad..324537b 100644
--- a/include/configs/alpr.h
+++ b/include/configs/alpr.h
@@ -296,7 +296,9 @@
/*-----------------------------------------------------------------------
* FPGA stuff
*-----------------------------------------------------------------------*/
-#define CONFIG_FPGA CFG_ALTERA_CYCLON2
+#define CONFIG_FPGA
+#define CONFIG_FPGA_ALTERA
+#define CONFIG_FPGA_CYCLON2
#define CFG_FPGA_CHECK_CTRLC
#define CFG_FPGA_PROG_FEEDBACK
#define CONFIG_FPGA_COUNT 1 /* Ich habe 2 ... aber in
diff --git a/include/xilinx.h b/include/xilinx.h
index 3704e1d..95ebe3d 100644
--- a/include/xilinx.h
+++ b/include/xilinx.h
@@ -31,11 +31,11 @@
*********************************************************************/
#define CFG_SPARTAN2 CFG_FPGA_DEV( 0x1 )
#define CFG_VIRTEX_E CFG_FPGA_DEV( 0x2 )
-#define CFG_VIRTEX2 CFG_FPGA_DEV( 0x4 )
+#define CFG_VIRTEX2 CFG_FPGA_DEV( 0x4 )
#define CFG_SPARTAN3 CFG_FPGA_DEV( 0x8 )
#define CFG_XILINX_SPARTAN2 (CFG_FPGA_XILINX | CFG_SPARTAN2)
#define CFG_XILINX_VIRTEX_E (CFG_FPGA_XILINX | CFG_VIRTEX_E)
-#define CFG_XILINX_VIRTEX2 (CFG_FPGA_XILINX | CFG_VIRTEX2)
+#define CFG_XILINX_VIRTEX2 (CFG_FPGA_XILINX | CFG_VIRTEX2)
#define CFG_XILINX_SPARTAN3 (CFG_FPGA_XILINX | CFG_SPARTAN3)
/* XXX - Add new models here */
--
1.5.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot-Users] [PATCH] Add pre and post configuration callbacks for Spartan FPGAs
2007-11-12 17:18 [U-Boot-Users] [PATCH] Improve configuration of FPGA subsystem Matthias Fuchs
@ 2007-11-12 17:18 ` Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add new Xilinx Spartan FPGA types Matthias Fuchs
` (2 subsequent siblings)
3 siblings, 0 replies; 5+ messages in thread
From: Matthias Fuchs @ 2007-11-12 17:18 UTC (permalink / raw)
To: u-boot
This patch adds a post configuration callback for Spartan2/3 FPGAs.
pre and post configuration callback are now optional and
not called when the function pointer is set to NULL.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
---
common/spartan2.c | 18 ++++++++++++++++--
common/spartan3.c | 18 ++++++++++++++++--
include/spartan2.h | 1 +
include/spartan3.h | 1 +
4 files changed, 34 insertions(+), 4 deletions(-)
diff --git a/common/spartan2.c b/common/spartan2.c
index 0181c35..724ad0d 100644
--- a/common/spartan2.c
+++ b/common/spartan2.c
@@ -561,6 +561,13 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
}
putc ('\n'); /* terminate the dotted line */
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+
#ifdef CFG_FPGA_PROG_FEEDBACK
if (ret_val == FPGA_SUCCESS) {
puts ("Done.\n");
@@ -615,8 +622,10 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
+ if (fn->pre) {
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+ }
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
@@ -633,6 +642,11 @@ static int Spartan2_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
+ if (fn->post) {
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+ }
+
fn_r->relocated = TRUE;
} else {
diff --git a/common/spartan3.c b/common/spartan3.c
index 4bf76a0..20edc0c 100644
--- a/common/spartan3.c
+++ b/common/spartan3.c
@@ -566,6 +566,13 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
}
putc ('\n'); /* terminate the dotted line */
+ /*
+ * Run the post configuration function if there is one.
+ */
+ if (*fn->post) {
+ (*fn->post) (cookie);
+ }
+
#ifdef CFG_FPGA_PROG_FEEDBACK
if (ret_val == FPGA_SUCCESS) {
puts ("Done.\n");
@@ -620,8 +627,10 @@ static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
PRINTF ("%s: Relocating descriptor at 0x%p\n", __FUNCTION__,
desc);
- addr = (ulong) (fn->pre) + reloc_offset;
- fn_r->pre = (Xilinx_pre_fn) addr;
+ if (fn->pre) {
+ addr = (ulong) (fn->pre) + reloc_offset;
+ fn_r->pre = (Xilinx_pre_fn) addr;
+ }
addr = (ulong) (fn->pgm) + reloc_offset;
fn_r->pgm = (Xilinx_pgm_fn) addr;
@@ -638,6 +647,11 @@ static int Spartan3_ss_reloc (Xilinx_desc * desc, ulong reloc_offset)
addr = (ulong) (fn->wr) + reloc_offset;
fn_r->wr = (Xilinx_wr_fn) addr;
+ if (fn->post) {
+ addr = (ulong) (fn->post) + reloc_offset;
+ fn_r->post = (Xilinx_post_fn) addr;
+ }
+
fn_r->relocated = TRUE;
} else {
diff --git a/include/spartan2.h b/include/spartan2.h
index d2e81e3..f3cde68 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -58,6 +58,7 @@ typedef struct {
Xilinx_init_fn init;
Xilinx_done_fn done;
Xilinx_wr_fn wr;
+ Xilinx_post_fn post;
int relocated;
} Xilinx_Spartan2_Slave_Serial_fns;
diff --git a/include/spartan3.h b/include/spartan3.h
index 65a3f5a..529aade 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -58,6 +58,7 @@ typedef struct {
Xilinx_init_fn init;
Xilinx_done_fn done;
Xilinx_wr_fn wr;
+ Xilinx_post_fn post;
int relocated;
} Xilinx_Spartan3_Slave_Serial_fns;
--
1.5.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot-Users] [PATCH] Add new Xilinx Spartan FPGA types
2007-11-12 17:18 [U-Boot-Users] [PATCH] Improve configuration of FPGA subsystem Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add pre and post configuration callbacks for Spartan FPGAs Matthias Fuchs
@ 2007-11-12 17:18 ` Matthias Fuchs
2007-11-12 17:19 ` [U-Boot-Users] [PATCH] Fix MSB check in Xilinx Spartan slave serial mode Matthias Fuchs
2007-11-12 17:19 ` [U-Boot-Users] [PATCH] Remove bit swapping in Xilinx Spartan bitfile loading Matthias Fuchs
3 siblings, 0 replies; 5+ messages in thread
From: Matthias Fuchs @ 2007-11-12 17:18 UTC (permalink / raw)
To: u-boot
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
---
include/spartan2.h | 4 ++++
include/spartan3.h | 10 +++++++++-
2 files changed, 13 insertions(+), 1 deletions(-)
diff --git a/include/spartan2.h b/include/spartan2.h
index f3cde68..bd159e1 100644
--- a/include/spartan2.h
+++ b/include/spartan2.h
@@ -70,6 +70,7 @@ typedef struct {
#define XILINX_XC2S50_SIZE 559232/8
#define XILINX_XC2S100_SIZE 781248/8
#define XILINX_XC2S150_SIZE 1040128/8
+#define XILINX_XC2S200_SIZE 1335872/8
/* Spartan-IIE (1.8V) */
#define XILINX_XC2S50E_SIZE 630048/8
@@ -96,6 +97,9 @@ typedef struct {
#define XILINX_XC2S150_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S150_SIZE, fn_table, cookie }
+#define XILINX_XC2S200_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan2, iface, XILINX_XC2S200_SIZE, fn_table, cookie }
+
#define XILINX_XC2S50E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan2, iface, XILINX_XC2S50E_SIZE, fn_table, cookie }
diff --git a/include/spartan3.h b/include/spartan3.h
index 529aade..c203eeb 100644
--- a/include/spartan3.h
+++ b/include/spartan3.h
@@ -81,9 +81,12 @@ typedef struct {
#define XILINX_XC3S1200E_SIZE 3841184/8
#define XILINX_XC3S1600E_SIZE 5969696/8
+/* Spartan-IIIE (1.2V) */
+#define XILINX_XC3S1200E_SIZE 3841184/8
+
/* Descriptor Macros
*********************************************************************/
-/* Spartan-II devices */
+/* Spartan-III devices */
#define XILINX_XC3S50_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S50_SIZE, fn_table, cookie }
@@ -125,4 +128,9 @@ typedef struct {
#define XILINX_XC3S1600E_DESC(iface, fn_table, cookie) \
{ Xilinx_Spartan3, iface, XILINX_XC3S1600E_SIZE, fn_table, cookie }
+
+/* Spartan-IIIE devices */
+#define XILINX_XC3S1200E_DESC(iface, fn_table, cookie) \
+{ Xilinx_Spartan3, iface, XILINX_XC3S1200E_SIZE, fn_table, cookie }
+
#endif /* _SPARTAN3_H_ */
--
1.5.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot-Users] [PATCH] Fix MSB check in Xilinx Spartan slave serial mode
2007-11-12 17:18 [U-Boot-Users] [PATCH] Improve configuration of FPGA subsystem Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add pre and post configuration callbacks for Spartan FPGAs Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add new Xilinx Spartan FPGA types Matthias Fuchs
@ 2007-11-12 17:19 ` Matthias Fuchs
2007-11-12 17:19 ` [U-Boot-Users] [PATCH] Remove bit swapping in Xilinx Spartan bitfile loading Matthias Fuchs
3 siblings, 0 replies; 5+ messages in thread
From: Matthias Fuchs @ 2007-11-12 17:19 UTC (permalink / raw)
To: u-boot
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
---
common/spartan2.c | 4 ++--
common/spartan3.c | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/common/spartan2.c b/common/spartan2.c
index 724ad0d..2f1ea2c 100644
--- a/common/spartan2.c
+++ b/common/spartan2.c
@@ -441,7 +441,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan2_Slave_Serial_fns *fn = desc->iface_fns;
int i;
- char val;
+ unsigned char val;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
@@ -516,7 +516,7 @@ static int Spartan2_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
(*fn->clk) (FALSE, TRUE, cookie);
CONFIG_FPGA_DELAY ();
/* Write data */
- (*fn->wr) ((val < 0), TRUE, cookie);
+ (*fn->wr) ((val & 0x80), TRUE, cookie);
CONFIG_FPGA_DELAY ();
/* Assert the clock */
(*fn->clk) (TRUE, TRUE, cookie);
diff --git a/common/spartan3.c b/common/spartan3.c
index 20edc0c..d329e70 100644
--- a/common/spartan3.c
+++ b/common/spartan3.c
@@ -446,7 +446,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
int ret_val = FPGA_FAIL; /* assume the worst */
Xilinx_Spartan3_Slave_Serial_fns *fn = desc->iface_fns;
int i;
- char val;
+ unsigned char val;
PRINTF ("%s: start with interface functions @ 0x%p\n",
__FUNCTION__, fn);
@@ -521,7 +521,7 @@ static int Spartan3_ss_load (Xilinx_desc * desc, void *buf, size_t bsize)
(*fn->clk) (FALSE, TRUE, cookie);
CONFIG_FPGA_DELAY ();
/* Write data */
- (*fn->wr) ((val < 0), TRUE, cookie);
+ (*fn->wr) ((val & 0x80), TRUE, cookie);
CONFIG_FPGA_DELAY ();
/* Assert the clock */
(*fn->clk) (TRUE, TRUE, cookie);
--
1.5.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
* [U-Boot-Users] [PATCH] Remove bit swapping in Xilinx Spartan bitfile loading
2007-11-12 17:18 [U-Boot-Users] [PATCH] Improve configuration of FPGA subsystem Matthias Fuchs
` (2 preceding siblings ...)
2007-11-12 17:19 ` [U-Boot-Users] [PATCH] Fix MSB check in Xilinx Spartan slave serial mode Matthias Fuchs
@ 2007-11-12 17:19 ` Matthias Fuchs
3 siblings, 0 replies; 5+ messages in thread
From: Matthias Fuchs @ 2007-11-12 17:19 UTC (permalink / raw)
To: u-boot
This patch removes the unnecessary bit swapping when
booting .bit files with the 'fpga loadb' command.
Signed-off-by: Matthias Fuchs <matthias.fuchs@esd-electronics.com>
---
common/cmd_fpga.c | 37 +------------------------------------
1 files changed, 1 insertions(+), 36 deletions(-)
diff --git a/common/cmd_fpga.c b/common/cmd_fpga.c
index 3affeba..6ede031 100644
--- a/common/cmd_fpga.c
+++ b/common/cmd_fpga.c
@@ -62,12 +62,9 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
{
#if defined(CONFIG_FPGA_XILINX)
unsigned int length;
- unsigned char* swapdata;
unsigned int swapsize;
char buffer[80];
- unsigned char *ptr;
unsigned char *dataptr;
- unsigned char data;
unsigned int i;
int rc;
@@ -145,39 +142,7 @@ int fpga_loadbitstream(unsigned long dev, char* fpgadata, size_t size)
dataptr+=4;
printf(" bytes in bitstream = %d\n", swapsize);
- /* check consistency of length obtained */
- if (swapsize >= size) {
- printf("%s: Could not find right length of data in bitstream\n",
- __FUNCTION__);
- return FPGA_FAIL;
- }
-
- /* allocate memory */
- swapdata = (unsigned char *)malloc(swapsize);
- if (swapdata == NULL) {
- printf("%s: Could not allocate %d bytes memory !\n",
- __FUNCTION__, swapsize);
- return FPGA_FAIL;
- }
-
- /* read data into memory and swap bits */
- ptr = swapdata;
- for (i = 0; i < swapsize; i++) {
- data = 0x00;
- data |= (*dataptr & 0x01) << 7;
- data |= (*dataptr & 0x02) << 5;
- data |= (*dataptr & 0x04) << 3;
- data |= (*dataptr & 0x08) << 1;
- data |= (*dataptr & 0x10) >> 1;
- data |= (*dataptr & 0x20) >> 3;
- data |= (*dataptr & 0x40) >> 5;
- data |= (*dataptr & 0x80) >> 7;
- *ptr++ = data;
- dataptr++;
- }
-
- rc = fpga_load(dev, swapdata, swapsize);
- free(swapdata);
+ rc = fpga_load(dev, dataptr, swapsize);
return rc;
#else
printf("Bitstream support only for Xilinx devices\n");
--
1.5.3
^ permalink raw reply related [flat|nested] 5+ messages in thread
end of thread, other threads:[~2007-11-12 17:19 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz follow: Atom feed
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2007-11-12 17:18 [U-Boot-Users] [PATCH] Improve configuration of FPGA subsystem Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add pre and post configuration callbacks for Spartan FPGAs Matthias Fuchs
2007-11-12 17:18 ` [U-Boot-Users] [PATCH] Add new Xilinx Spartan FPGA types Matthias Fuchs
2007-11-12 17:19 ` [U-Boot-Users] [PATCH] Fix MSB check in Xilinx Spartan slave serial mode Matthias Fuchs
2007-11-12 17:19 ` [U-Boot-Users] [PATCH] Remove bit swapping in Xilinx Spartan bitfile loading Matthias Fuchs
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