From mboxrd@z Thu Jan 1 00:00:00 1970 From: Dave Liu Date: Thu, 17 Jan 2008 09:30:08 +0800 Subject: [U-Boot-Users] [PATCH 1/2] mpc83xx: add support for more system clock performance controls In-Reply-To: <20080116003801.b79618b7.kim.phillips@freescale.com> References: <20080116003801.b79618b7.kim.phillips@freescale.com> Message-ID: <1200533408.3707.2.camel@localhost.localdomain> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Wed, 2008-01-16 at 00:38 -0600, Kim Phillips wrote: > System registers that are modified are the Arbiter Configuration > Register (ACR), the System Priority Control Register (SPCR), and the > System Clock Configuration Register (SCCR). > > Signed-off by: Michael F. Reiss > Signed-off by: Joe D'Abbraccio > Signed-off-by: Kim Phillips > --- > cpu/mpc83xx/cpu_init.c | 73 +++++++++++++++++++++++++++++++++-------------- > cpu/mpc83xx/speed.c | 12 ++++---- > include/mpc83xx.h | 13 ++++++-- > 3 files changed, 67 insertions(+), 31 deletions(-) > > diff --git a/cpu/mpc83xx/cpu_init.c b/cpu/mpc83xx/cpu_init.c > index 18d5a76..3337d8c 100644 > --- a/cpu/mpc83xx/cpu_init.c > +++ b/cpu/mpc83xx/cpu_init.c > @@ -78,59 +78,88 @@ void cpu_init_f (volatile immap_t * im) > im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSECEP) | (CFG_SPCR_TSECEP << SPCR_TSECEP_SHIFT); > #endif > > +#ifdef CFG_ACR_RPTCNT > + /* Arbiter repeat count */ > + im->arbiter.acr = (im->arbiter.acr & ~(ACR_RPTCNT)) | > + (CFG_ACR_RPTCNT << ACR_RPTCNT_SHIFT); > +#endif > + > +#ifdef CFG_SPCR_TSECEP > + /* all TSEC's Emergency priority */ > + im->sysconf.spcr = (im->sysconf.spcr & ~SPCR_TSECEP) | > + (CFG_SPCR_TSECEP << SPCR_TSECEP_SHIFT); > +#endif The file has one CFG_SPCR_TSECEP before this, so I will send one patch to remove redundant one. Thanks, Dave