From: Luigi 'Comio' Mantellini <luigi.mantellini@idf-hit.com>
To: u-boot@lists.denx.de
Subject: [U-Boot-Users] UNCACHED_SDRAM macro issue
Date: Thu, 14 Feb 2008 10:01:57 +0100 [thread overview]
Message-ID: <1202979717.29669.87.camel@cartesio> (raw)
In-Reply-To: <47B3BBBD.7090707@necel.com>
Hi Shinya,
see inline.
On gio, 2008-02-14 at 12:55 +0900, Shinya Kuribayashi wrote:
> Luigi 'Comio' Mantellini wrote:
...
>
> So it seems Alchemy-based SoC. if so,
>
No. I'm working on a SoC that uses a IP core from MIPS (mips4kec). The
mips core should be (formally) a standard mips core.
> > What I need to change on my board specific u-boot in order to use the
> > KSEG1 address space?
>
> what do you mean "in order to use the KSEG1 address space?" I'm not
> familiar with Au1XXX, but you might need CONFIG_AU1X00 in your board
> config. Some URLs added[1][2].
>
The CONFIG_AU1X00 doesn't work for me. from datasheet there aren't
differences between my SoC and the standalone mips4kec. This is the
memory map how depicted by the datasheet:
0x00000000--0x7fffffff KUser - Cached / Mapped
0x80000000--0x9fffffff KSEG0 - Cached / Unmapped
0xA0000000--0x9fffffff KSEG1 - Uncached / Unmapped
....
I think that on my application the UNCACHED_SDRAM should map the address
on KSEG1 (how it is now) but this simply doesn't work. Instead, using
the PHYSADDR(a) macro... the kernel is able to start.
I suspect that there are issues on cache management. Can be?
Thanks a lot,
luigi
> Shinya
>
> [1] http://thread.gmane.org/gmane.comp.boot-loaders.u-boot/32316/focus=32372
> [2] http://www.linux-mips.org/wiki/Alchemy
--
______ Luigi Mantellini
.'______'. R&D - Software
(.' '.) Industrie Dial Face S.p.A.
( :=----=: ) Via Canzo, 4
('.______.') 20068 Peschiera Borromeo (MI), Italy
'.______.' Tel.: +39 02 5167 2813
Fax: +39 02 5167 2459
Ind. Dial Face Email: luigi.mantellini at idf-hit.com
next prev parent reply other threads:[~2008-02-14 9:01 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-02-13 8:59 [U-Boot-Users] UNCACHED_SDRAM macro issue Luigi 'Comio' Mantellini
2008-02-14 3:55 ` Shinya Kuribayashi
2008-02-14 9:01 ` Luigi 'Comio' Mantellini [this message]
2008-02-15 0:43 ` Shinya Kuribayashi
2008-02-15 9:11 ` Shinya Kuribayashi
2008-02-16 9:06 ` Shinya Kuribayashi
2008-02-16 11:50 ` Luigi 'Comio' Mantellini
2008-02-28 8:23 ` Luigi 'Comio' Mantellini
2008-02-28 8:34 ` Shinya Kuribayashi
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