[U-Boot] [PATCH 04/14] FSL DDR: Provide a generic fsl_ddr_sdram_set_lawbar()

[Kumar Gala <galak@kernel.crashing.org>]

Make fsl_ddr_sdram_set_lawbar() a weak function to allow board code to
override if desired.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 drivers/misc/fsl_law.c |   87 ++++++++++++++++++++++++++++++++++++++++++++++++
 1 files changed, 87 insertions(+), 0 deletions(-)

diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 48ece4f..37af297 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -121,6 +121,93 @@ void print_laws(void)
 	return;
 }
 
+#if defined(CONFIG_FSL_DDR1) || \
+    defined(CONFIG_FSL_DDR2) || \
+    defined(CONFIG_FSL_DDR3)
+#include <../cpu/mpc8xxx/fsl_ddr_sdram.h>
+
+/* use up to 2 LAWs for DDR, used the last available LAWs */
+int __set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
+{
+	u64 start_align, law_sz;
+	int law_sz_enc;
+
+	if (start == 0)
+		start_align = 1ull << (LAW_SIZE_32G + 1);
+	else
+		start_align = 1ull << (ffs64(start) - 1);
+	law_sz = min(start_align, sz);
+	law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+	if (set_last_law(start, law_sz_enc, id) < 0)
+		return -1;
+
+	/* do we still have anything to map */
+	sz = sz - law_sz;
+	if (sz) {
+		start += law_sz;
+
+		start_align = 1ull << (ffs64(start) - 1);
+		law_sz = min(start_align, sz);
+		law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+		if (set_last_law(start, law_sz_enc, id) < 0)
+			return -1;
+	} else {
+		return 0;
+	}
+
+	/* do we still have anything to map */
+	sz = sz - law_sz;
+	if (sz)
+		return 1;
+
+	return 0;
+}
+
+void
+__fsl_ddr_sdram_set_lawbar(const common_timing_params_t *memctl_common_params,
+			   unsigned int memctl_interleaved,
+			   unsigned int ctrl_num)
+{
+	/*
+	 * If no DIMMs on this controller, do not proceed any further.
+	 */
+	if (!memctl_common_params->ndimms_present) {
+		return;
+	}
+
+	if (ctrl_num == 0) {
+		/*
+		 * Set up LAW for DDR controller 1 space.
+		 */
+		unsigned int lawbar1_target_id = memctl_interleaved
+			? LAW_TRGT_IF_DDR_INTRLV : LAW_TRGT_IF_DDR_1;
+
+		if (__set_ddr_laws(memctl_common_params->base_address,
+				memctl_common_params->total_mem,
+				lawbar1_target_id) < 0) {
+			printf("ERROR\n");
+			return ;
+		}
+	} else if (ctrl_num == 1) {
+		if (__set_ddr_laws(memctl_common_params->base_address,
+				memctl_common_params->total_mem,
+				LAW_TRGT_IF_DDR_2) < 0) {
+			printf("ERROR\n");
+			return ;
+		}
+	} else {
+		printf("unexpected controller number %u in fsl_ddr_sdram_set_lawbar()\n", ctrl_num);
+	}
+}
+
+__attribute__((weak, alias("__fsl_ddr_sdram_set_lawbar"))) void
+fsl_ddr_sdram_set_lawbar(const common_timing_params_t *memctl_common_params,
+			 unsigned int memctl_interleaved,
+			 unsigned int ctrl_num);
+#endif
+
 void init_laws(void)
 {
 	int i;
-- 
1.5.5.1