From: Kumar Gala <galak@kernel.crashing.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v5 02/10] FSL DDR: Provide a generic set_ddr_laws()
Date: Tue, 26 Aug 2008 15:01:28 -0500 [thread overview]
Message-ID: <1219780898-9262-3-git-send-email-galak@kernel.crashing.org> (raw)
In-Reply-To: <1219780898-9262-2-git-send-email-galak@kernel.crashing.org>
Provide a helper function that will setup the last available
LAWs (upto 2) for DDR. Useful for SPD/dyanmic DDR setting code.
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
drivers/misc/fsl_law.c | 39 +++++++++++++++++++++++++++++++++++++++
include/asm-ppc/fsl_law.h | 1 +
2 files changed, 40 insertions(+), 0 deletions(-)
diff --git a/drivers/misc/fsl_law.c b/drivers/misc/fsl_law.c
index 48ece4f..e4e5c31 100644
--- a/drivers/misc/fsl_law.c
+++ b/drivers/misc/fsl_law.c
@@ -121,6 +121,45 @@ void print_laws(void)
return;
}
+/* use up to 2 LAWs for DDR, used the last available LAWs */
+int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id)
+{
+ u64 start_align, law_sz;
+ int law_sz_enc;
+
+ if (start == 0)
+ start_align = 1ull << (LAW_SIZE_32G + 1);
+ else
+ start_align = 1ull << (ffs64(start) - 1);
+ law_sz = min(start_align, sz);
+ law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+ if (set_last_law(start, law_sz_enc, id) < 0)
+ return -1;
+
+ /* do we still have anything to map */
+ sz = sz - law_sz;
+ if (sz) {
+ start += law_sz;
+
+ start_align = 1ull << (ffs64(start) - 1);
+ law_sz = min(start_align, sz);
+ law_sz_enc = __ilog2_u64(law_sz) - 1;
+
+ if (set_last_law(start, law_sz_enc, id) < 0)
+ return -1;
+ } else {
+ return 0;
+ }
+
+ /* do we still have anything to map */
+ sz = sz - law_sz;
+ if (sz)
+ return 1;
+
+ return 0;
+}
+
void init_laws(void)
{
int i;
diff --git a/include/asm-ppc/fsl_law.h b/include/asm-ppc/fsl_law.h
index 227bf83..5bba08d 100644
--- a/include/asm-ppc/fsl_law.h
+++ b/include/asm-ppc/fsl_law.h
@@ -75,6 +75,7 @@ struct law_entry {
extern void set_law(u8 idx, phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
extern int set_next_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
extern int set_last_law(phys_addr_t addr, enum law_size sz, enum law_trgt_if id);
+extern int set_ddr_laws(u64 start, u64 sz, enum law_trgt_if id);
extern void disable_law(u8 idx);
extern void init_laws(void);
extern void print_laws(void);
--
1.5.5.1
next prev parent reply other threads:[~2008-08-26 20:01 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2008-08-26 20:01 [U-Boot] [PATCH v5 00/10] FSL DDR rework Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 01/10] Add proper SPD definitions for DDR1/2/3 Kumar Gala
2008-08-26 20:01 ` Kumar Gala [this message]
2008-08-26 20:01 ` [U-Boot] [PATCH v5 03/10] FSL DDR: Rewrite the FSL mpc8xxx DDR controller setup code Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 04/10] FSL DDR: Add DDR1 DIMM paramter support Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 04/10] FSL DDR: Add DDR1 support Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 05/10] FSL DDR: Add DDR2 DIMM paramter support Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 05/10] FSL DDR: Add DDR2 support Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 06/10] FSL DDR: Add 86xx specific register setting Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 07/10] FSL DDR: Convert MPC8641HPCN to new DDR code Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 08/10] FSL DDR: Convert MPC8610HPCD " Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 09/10] FSL DDR: Convert SBC8641D " Kumar Gala
2008-08-26 20:01 ` [U-Boot] [PATCH v5 10/10] FSL DDR: Remove old SPD support from cpu/mpc86xx Kumar Gala
2008-08-27 0:05 ` [U-Boot] [PATCH v5 05/10] FSL DDR: Add DDR2 support Kumar Gala
2008-08-27 0:05 ` [U-Boot] [PATCH v5 04/10] FSL DDR: Add DDR1 support Kumar Gala
2008-08-27 0:08 ` Wolfgang Denk
2008-08-27 0:08 ` [U-Boot] [PATCH v5 00/10] FSL DDR rework Wolfgang Denk
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