From mboxrd@z Thu Jan 1 00:00:00 1970 From: Kumar Gala Date: Thu, 23 Oct 2008 01:47:37 -0500 Subject: [U-Boot] [PATCH 1/2] 85xx: Use CONFIG_SYS_CACHELINE_SIZE instead of magic number Message-ID: <1224744458-15481-1-git-send-email-galak@kernel.crashing.org> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de Using CONFIG_SYS_CACHELINE_SIZE instead of 31 means we can handle e500mc's 64-byte cacheline properly when it gets added. Signed-off-by: Kumar Gala --- cpu/mpc85xx/start.S | 4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu/mpc85xx/start.S b/cpu/mpc85xx/start.S index fc3c336..f16d4c0 100644 --- a/cpu/mpc85xx/start.S +++ b/cpu/mpc85xx/start.S @@ -998,8 +998,8 @@ trap_reloc: .globl unlock_ram_in_cache unlock_ram_in_cache: /* invalidate the INIT_RAM section */ - lis r3,(CONFIG_SYS_INIT_RAM_ADDR & ~31)@h - ori r3,r3,(CONFIG_SYS_INIT_RAM_ADDR & ~31)@l + lis r3,(CONFIG_SYS_INIT_RAM_ADDR & ~(CONFIG_SYS_CACHELINE_SIZE-1))@h + ori r3,r3,(CONFIG_SYS_INIT_RAM_ADDR & ~(CONFIG_SYS_CACHELINE_SIZE-1))@l mfspr r4,L1CFG0 andi. r4,r4,0x1ff slwi r4,r4,(10 - 1 - L1_CACHE_SHIFT) -- 1.5.5.1