[U-Boot] [PATCH 3/3] dt: bcm63158: watchdog should use a 50Mhz clock

[Philippe REYNES <philippe.reynes@softathome.com>]

Hi Stefan,

> On 03.05.19 19:43, Philippe Reynes wrote:
>> The watchdog should use a clock at 50 Mhz, so
>> instead of using the clock osc (200 Mhz), we
>> define a reference clock at 50Mhz and use it
>> for both watchdog.
>> 
>> Signed-off-by: Philippe Reynes <philippe.reynes@softathome.com>
> 
> Just curious: Why is this the case? Is this also what's done in
> the Linux DT version?

From my understanding, in the linux kernel, the driver doesn't compute
the timeout for the watchdog counter register. Every second, the driver
set the maximum value in the watchdog counter register and compute a
logical tick. If this tick decrease below zero, the watchdog isn't
restarted, so when the watchdog counter reach zero,  the board is resetted.

In u-boot, the driver compute the expected timeout and set it
in the watchdog register.

> Other than that:
> 
> Reviewed-by: Stefan Roese <sr@denx.de>

Thanks

> Thanks,
> Stefan

Regards,
Philippe



> 
>> ---
>> arch/arm/dts/bcm63158.dtsi | 10 ++++++++--
>> 1 file changed, 8 insertions(+), 2 deletions(-)
>> 
>> diff --git a/arch/arm/dts/bcm63158.dtsi b/arch/arm/dts/bcm63158.dtsi
>> index 4b2eaee..175af38 100644
>> --- a/arch/arm/dts/bcm63158.dtsi
>> +++ b/arch/arm/dts/bcm63158.dtsi
>> @@ -66,6 +66,12 @@
>> clock-frequency = <0xbebc200>;
>> u-boot,dm-pre-reloc;
>> };
>> +
>> + refclk50mhz: refclk50mhz {
>> + compatible = "fixed-clock";
>> + #clock-cells = <0>;
>> + clock-frequency = <50000000>;
>> + };
>> };
>> 
>> ubus {
>> @@ -92,13 +98,13 @@
>> wdt1: watchdog at ff800480 {
>> compatible = "brcm,bcm6345-wdt";
>> reg = <0x0 0xff800480 0x0 0x14>;
>> - clocks = <&periph_osc>;
>> + clocks = <&refclk50mhz>;
>> };
>> 
>> wdt2: watchdog at ff8004c0 {
>> compatible = "brcm,bcm6345-wdt";
>> reg = <0x0 0xff8004c0 0x0 0x14>;
>> - clocks = <&periph_osc>;
>> + clocks = <&refclk50mhz>;
>> };
>> 
>> wdt-reboot {
>> 
> 
> Viele Grüße,
> Stefan
> 
> --
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