From mboxrd@z Thu Jan 1 00:00:00 1970 From: Valeriy Glushkov Date: Wed, 4 Feb 2009 18:27:49 +0200 Subject: [U-Boot] [PATCH v3] MPC8349ITX: several config issues fixed Message-ID: <12337648692469-git-send-email-gvv@lstec.com> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de The previous version rebooted forever with DDR bigger than 256MB. Access the DS1339 RTC chip is on I2C1 bus. Allow DHCP. Signed-off-by: Valeriy Glushkov --- include/configs/MPC8349ITX.h | 5 +++++ 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/include/configs/MPC8349ITX.h b/include/configs/MPC8349ITX.h index 14cbc45..f1b5566 100644 --- a/include/configs/MPC8349ITX.h +++ b/include/configs/MPC8349ITX.h @@ -98,6 +98,7 @@ #define CONFIG_SYS_I2C_OFFSET 0x3000 #define CONFIG_SYS_I2C2_OFFSET 0x3100 #define CONFIG_SYS_SPD_BUS_NUM 1 /* The I2C bus for SPD */ +#define CONFIG_SYS_RTC_BUS_NUM 1 /* The I2C bus for RTC */ #define CONFIG_SYS_I2C_8574_ADDR1 0x20 /* I2C1, PCF8574 */ #define CONFIG_SYS_I2C_8574_ADDR2 0x21 /* I2C1, PCF8574 */ @@ -158,6 +159,9 @@ #define CONFIG_SYS_DDR_SDRAM_CLK_CNTL (DDR_SDRAM_CLK_CNTL_SS_EN | \ DDR_SDRAM_CLK_CNTL_CLK_ADJUST_075) +#define CONFIG_VERY_BIG_RAM +#define CONFIG_MAX_MEM_MAPPED ((phys_size_t)256 << 20) + #ifdef CONFIG_HARD_I2C #define CONFIG_SPD_EEPROM /* use SPD EEPROM for DDR setup*/ #endif @@ -447,6 +451,7 @@ boards, we say we have two, but don't display a message if we find only one. */ #define CONFIG_CMD_IRQ #define CONFIG_CMD_NET #define CONFIG_CMD_PING +#define CONFIG_CMD_DHCP #define CONFIG_CMD_SDRAM #ifdef CONFIG_COMPACT_FLASH -- 1.5.2.5