[U-Boot] [PATCH 2/3][v2] dnet: driver for Dave DNET ethernet controller

Jean-Christophe PLAGNIOL-VILLARD
2009-02-05T21:25:26Z

On 06:32 Thu 05 Feb , Ilya Yanok wrote:
> Driver for Dave DNET ethernet controller (used on Dave/DENX
> QongEVB-LITE board).
>
> Signed-off-by: Ilya Yanok <yanok@emcraft.com>
please have Ben ack
> ---
> drivers/net/Makefile | 2 +
> drivers/net/dnet.c | 394 ++++++++++++++++++++++++++++++++++++++++++++++++++
> drivers/net/dnet.h | 166 +++++++++++++++++++++
> include/netdev.h | 1 +
> 4 files changed, 563 insertions(+), 0 deletions(-)
> create mode 100644 drivers/net/dnet.c
> create mode 100644 drivers/net/dnet.h
>
> diff --git a/drivers/net/Makefile b/drivers/net/Makefile
> index 128dc11..10e3c6d 100644
> --- a/drivers/net/Makefile
> +++ b/drivers/net/Makefile
> @@ -33,6 +33,7 @@ COBJS-$(CONFIG_BFIN_MAC) += bfin_mac.o
> COBJS-$(CONFIG_DRIVER_CS8900) += cs8900.o
> COBJS-$(CONFIG_TULIP) += dc2114x.o
> COBJS-$(CONFIG_DRIVER_DM9000) += dm9000x.o
> +COBJS-$(CONFIG_DNET) += dnet.o
> COBJS-$(CONFIG_E1000) += e1000.o
> COBJS-$(CONFIG_EEPRO100) += eepro100.o
> COBJS-$(CONFIG_ENC28J60) += enc28j60.o
> @@ -69,6 +70,7 @@ COBJS-$(CONFIG_ULI526X) += uli526x.o
> COBJS-$(CONFIG_VSC7385_ENET) += vsc7385.o
> COBJS-$(CONFIG_XILINX_EMAC) += xilinx_emac.o
> COBJS-$(CONFIG_XILINX_EMACLITE) += xilinx_emaclite.o
> +COBJS-$(CONFIG_SH_ETHER) += sh_eth.o
>
> COBJS := $(COBJS-y)
> SRCS := $(COBJS:.o=.c)
> diff --git a/drivers/net/dnet.c b/drivers/net/dnet.c
> new file mode 100644
> index 0000000..e7cd716
> --- /dev/null
> +++ b/drivers/net/dnet.c
> @@ -0,0 +1,394 @@
> +/*
> + * Dave Ethernet Controller driver
> + *
> + * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include <common.h>
> +
> +#define CFG_DNET_AUTONEG_TIMEOUT 5000000
pelase use CONFIG_ and maybe move it in a header
> +
> +#include <net.h>
> +#include <malloc.h>
> +#include <linux/mii.h>
> +
> +#include <miiphy.h>
> +#include <asm/io.h>
> +
> +#include "dnet.h"
> +
> +struct dnet_device {
> + struct dnet_registers *regs;
> + const struct device *dev;
> + struct eth_device netdev;
> + unsigned short phy_addr;
> +};
> +
> +++ b/drivers/net/dnet.h
> @@ -0,0 +1,166 @@
> +/*
> + * Dave Ethernet Controller driver
> + *
> + * Copyright (C) 2008 Dave S.r.l. <www.dave.eu>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#ifndef __DRIVERS_DNET_H__
> +#define __DRIVERS_DNET_H__
> +
> +#define DRIVERNAME "dnet"
> +
> +struct dnet_registers {
> + /* ALL DNET FIFO REGISTERS */
> + u32 RX_LEN_FIFO;
> + u32 RX_DATA_FIFO;
> + u32 TX_LEN_FIFO;
> + u32 TX_DATA_FIFO;
> + u32 pad1[0x3c];
> + /* ALL DNET CONTROL/STATUS REGISTERS */
> + u32 VERCAPS;
> + u32 INTR_SRC;
> + u32 INTR_ENB;
> + u32 RX_STATUS;
> + u32 TX_STATUS;
> + u32 RX_FRAMES_CNT;
> + u32 TX_FRAMES_CNT;
> + u32 RX_FIFO_TH;
> + u32 TX_FIFO_TH;
> + u32 SYS_CTL;
> + u32 PAUSE_TMR;
> + u32 RX_FIFO_WCNT;
> + u32 TX_FIFO_WCNT;
> + u32 pad2[0x33];
> + /* ALL DNET MAC REGISTERS */
> + u32 MACREG_DATA; /* Mac-Reg Data */
> + u32 MACREG_ADDR; /* Mac-Reg Addr */
^^
whitespace please fix
> + u32 pad3[0x3e];
> + /* ALL DNET RX STATISTICS COUNTERS */
^^
whitespace please fix
> + u32 RX_PKT_IGNR_CNT;
> + u32 RX_LEN_CHK_ERR_CNT;
> + u32 RX_LNG_FRM_CNT;
> + u32 RX_SHRT_FRM_CNT;
> + u32 RX_IPG_VIOL_CNT;
> + u32 RX_CRC_ERR_CNT;
> + u32 RX_OK_PKT_CNT;
> + u32 RX_CTL_FRM_CNT;
> + u32 RX_PAUSE_FRM_CNT;
> + u32 RX_MULTICAST_CNT;
> + u32 RX_BROADCAST_CNT;
> + u32 RX_VLAN_TAG_CNT;
> + u32 RX_PRE_SHRINK_CNT;
> + u32 RX_DRIB_NIB_CNT;
> + u32 RX_UNSUP_OPCD_CNT;
> + u32 RX_BYTE_CNT;
> + u32 pad4[0x30];
> + /* DNET TX STATISTICS COUNTERS */
> + u32 TX_UNICAST_CNT;
> + u32 TX_PAUSE_FRM_CNT;
> + u32 TX_MULTICAST_CNT;
> + u32 TX_BRDCAST_CNT;
> + u32 TX_VLAN_TAG_CNT;
> + u32 TX_BAD_FCS_CNT;
> + u32 TX_JUMBO_CNT;
> + u32 TX_BYTE_CNT;
> +} __attribute__((packed));
> +
> +/* SOME INTERNAL MAC-CORE REGISTER */
> +#define DNET_INTERNAL_MODE_REG 0x0
^^^^^^^^^^^^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_REG 0x2
^^^^
whitespace please fix
> +#define DNET_INTERNAL_MAX_PKT_SIZE_REG 0x4
^^^^
whitespace please fix
> +#define DNET_INTERNAL_IGP_REG 0x8
^^^^^^^^^^^^^
whitespace please fix
> +#define DNET_INTERNAL_MAC_ADDR_0_REG 0xa
^^^^^^
whitespace please fix
> +#define DNET_INTERNAL_MAC_ADDR_1_REG 0xc
^^^^^^
whitespace please fix
> +#define DNET_INTERNAL_MAC_ADDR_2_REG 0xe
^^^^^^
whitespace please fix
> +#define DNET_INTERNAL_TX_RX_STS_REG 0x12
> +#define DNET_INTERNAL_GMII_MNG_CTL_REG 0x14
> +#define DNET_INTERNAL_GMII_MNG_DAT_REG 0x16
> +
> +#define DNET_INTERNAL_GMII_MNG_CMD_FIN (1 << 14)
> +
> +#define DNET_INTERNAL_WRITE (1 << 31)
> +
> +/* MAC-CORE REGISTER FIELDS */
> +
> +/* MAC-CORE MODE REGISTER FIELDS */
> +#define DNET_INTERNAL_MODE_GBITEN (1 << 0)
^
whitespace please fix
> +#define DNET_INTERNAL_MODE_FCEN (1 << 1)
^
whitespace please fix
> +#define DNET_INTERNAL_MODE_RXEN (1 << 2)
^
whitespace please fix
> +#define DNET_INTERNAL_MODE_TXEN (1 << 3)
^
whitespace please fix
> +
> +/* MAC-CORE RXTX CONTROL REGISTER FIELDS */
> +#define DNET_INTERNAL_RXTX_CONTROL_RXSHORTFRAME (1 << 8)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_RXBROADCAST (1 << 7)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_RXMULTICAST (1 << 4)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_RXPAUSE (1 << 3)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_DISTXFCS (1 << 2)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_DISCFXFCS (1 << 1)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_ENPROMISC (1 << 0)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_DROPCONTROL (1 << 6)
^
whitespace please fix
> +#define DNET_INTERNAL_RXTX_CONTROL_ENABLEHALFDUP (1 << 5)
^
whitespace please fix
> +
> +/* SYSTEM CONTROL REGISTER FIELDS */
> +#define DNET_SYS_CTL_IGNORENEXTPKT (1 << 0)
> +#define DNET_SYS_CTL_SENDPAUSE (1 << 2)
> +#define DNET_SYS_CTL_RXFIFOFLUSH (1 << 3)
> +#define DNET_SYS_CTL_TXFIFOFLUSH (1 << 4)
> +
> +/*
> + * Capabilities. Used by the driver to know the capabilities that
> + * the ethernet controller inside the FPGA have.
> + */
> +
> +#define DNET_HAS_MDIO (1 << 0)
^
whitespace please fix
> +#define DNET_HAS_IRQ (1 << 1)
^
whitespace please fix
> +#define DNET_HAS_GIGABIT (1 << 2)
^
whitespace please fix
> +#define DNET_HAS_DMA (1 << 3)
^
whitespace please fix
> +
> +#define DNET_HAS_MII (1 << 4) /* or GMII */
> +#define DNET_HAS_RMII (1 << 5) /* or RGMII */
> +
> +#define DNET_CAPS_MASK 0xFFFF
> +
> +#define DNET_FIFO_SIZE 2048 /* 2K x 32 bit */
> +#define DNET_FIFO_TX_DATA_AF_TH (DNET_FIFO_SIZE - 384) /* 384 = 1536 / 4 */
> +#define DNET_FIFO_TX_DATA_AE_TH (384)
> +
> +#define DNET_FIFO_RX_CMD_AF_TH (1 << 16) /* just one frame inside the FIFO */
> +
> +#endif
Best Regards,
J.