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From: Kumar Gala <galak@kernel.crashing.org>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH v3 6/7] ppc/p4080: Handle timebase enabling and frequency reporting
Date: Sat, 19 Sep 2009 11:00:07 -0500	[thread overview]
Message-ID: <1253376008-13225-6-git-send-email-galak@kernel.crashing.org> (raw)
In-Reply-To: <1253376008-13225-5-git-send-email-galak@kernel.crashing.org>

On CoreNet style platforms the timebase frequency is the bus frequency
defined by 16 (on PQ3 it is divide by 8).  Also on the CoreNet platforms
the core not longer controls the enabling of the timebase.  We now need
to enable the boot core's timebase via CCSR register writes.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
* Used get_tbclk() in fdt code to remove #ifdef

 cpu/mpc85xx/cpu.c      |    4 ++++
 cpu/mpc85xx/cpu_init.c |   12 ++++++++++++
 cpu/mpc85xx/fdt.c      |    4 ++--
 3 files changed, 18 insertions(+), 2 deletions(-)

diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c
index bdd9ee4..25c0416 100644
--- a/cpu/mpc85xx/cpu.c
+++ b/cpu/mpc85xx/cpu.c
@@ -184,7 +184,11 @@ int do_reset (cmd_tbl_t *cmdtp, bd_t *bd, int flag, int argc, char *argv[])
  */
 unsigned long get_tbclk (void)
 {
+#ifdef CONFIG_FSL_CORENET
+	return (gd->bus_clk + 8) / 16;
+#else
 	return (gd->bus_clk + 4UL)/8UL;
+#endif
 }
 
 
diff --git a/cpu/mpc85xx/cpu_init.c b/cpu/mpc85xx/cpu_init.c
index a6d1e99..428b461 100644
--- a/cpu/mpc85xx/cpu_init.c
+++ b/cpu/mpc85xx/cpu_init.c
@@ -229,6 +229,18 @@ void cpu_init_f (void)
 #if defined(CONFIG_FSL_DMA)
 	dma_init();
 #endif
+#ifdef CONFIG_FSL_CORENET
+	{
+		volatile ccsr_rcpm_t *rcpm =
+			(void *)(CONFIG_SYS_FSL_CORENET_RCPM_ADDR);
+		volatile ccsr_pic_t *pic =
+			(void *)(CONFIG_SYS_MPC85xx_PIC_ADDR);
+		u32 whoami = in_be32(&pic->whoami);
+
+		/* Enable the timebase register for this core */
+		out_be32(&rcpm->ctbenrl, (1 << whoami));
+	}
+#endif
 }
 
 
diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c
index 723f473..64a1710 100644
--- a/cpu/mpc85xx/fdt.c
+++ b/cpu/mpc85xx/fdt.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2007 Freescale Semiconductor, Inc.
+ * Copyright 2007-2009 Freescale Semiconductor, Inc.
  *
  * (C) Copyright 2000
  * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
@@ -287,7 +287,7 @@ void ft_cpu_setup(void *blob, bd_t *bd)
 	fdt_add_enet_stashing(blob);
 
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
-		"timebase-frequency", bd->bi_busfreq / 8, 1);
+		"timebase-frequency", get_tbclk(), 1);
 	do_fixup_by_prop_u32(blob, "device_type", "cpu", 4,
 		"bus-frequency", bd->bi_busfreq, 1);
 	get_sys_info(&sysinfo);
-- 
1.6.0.6

  reply	other threads:[~2009-09-19 16:00 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-09-19 16:00 [U-Boot] [PATCH v3 1/7] ppc/p4080: Add p4080 platform immap definitions Kumar Gala
2009-09-19 16:00 ` [U-Boot] [PATCH v3 2/7] ppc/p4080: Add support for CoreNet style platform LAWs Kumar Gala
2009-09-19 16:00   ` [U-Boot] [PATCH v3 3/7] ppc/p4080: CoreNet platfrom style CCSRBAR setting Kumar Gala
2009-09-19 16:00     ` [U-Boot] [PATCH v3 4/7] ppc/p4080: CoreNet platfrom style secondary core release Kumar Gala
2009-09-19 16:00       ` [U-Boot] [PATCH v3 5/7] ppc/p4080: Add various p4080 related defines (and p4040) Kumar Gala
2009-09-19 16:00         ` Kumar Gala [this message]
2009-09-19 16:00           ` [U-Boot] [PATCH v3 7/7] ppc/p4080: Determine various chip frequencies on CoreNet platforms Kumar Gala
2009-09-23 20:34   ` [U-Boot] [PATCH v3 2/7] ppc/p4080: Add support for CoreNet style platform LAWs Wolfgang Denk
2009-09-23 20:29 ` [U-Boot] [PATCH v3 1/7] ppc/p4080: Add p4080 platform immap definitions Wolfgang Denk

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