[U-Boot] [PATCH 1/3] Add support to disable cpu's in multicore processors

[U-Boot] [PATCH 1/3] Add support to disable cpu's in multicore processors

[Kumar Gala]

Add a disable sub-command to the cpu command that allows for disabling
cores in multicore processors.  This can be useful for systems that are
using multicore chips but aren't utilizing all the cores as a way to
reduce power and possibly improve performance.

Also updated an added missing copyright.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 common/cmd_mp.c  |    3 +++
 cpu/mpc85xx/mp.c |    8 +++++++-
 cpu/mpc86xx/mp.c |   28 ++++++++++++++++++++++++++++
 include/common.h |    1 +
 4 files changed, 39 insertions(+), 1 deletions(-)

diff --git a/common/cmd_mp.c b/common/cmd_mp.c
index 71e4303..d78c209 100644
--- a/common/cmd_mp.c
+++ b/common/cmd_mp.c
@@ -46,6 +46,8 @@ cpu_cmd(cmd_tbl_t *cmdtp, int flag, int argc, char *argv[])
 			cpu_reset(cpuid);
 		} else if (strncmp(argv[2], "status", 6) == 0) {
 			cpu_status(cpuid);
+		} else if (strncmp(argv[2], "disable", 7) == 0) {
+			return cpu_disable(cpuid);
 		} else {
 			cmd_usage(cmdtp);
 			return 1;
@@ -86,6 +88,7 @@ U_BOOT_CMD(
 	"Multiprocessor CPU boot manipulation and release",
 	    "<num> reset                 - Reset cpu <num>\n"
 	"cpu <num> status                - Status of cpu <num>\n"
+	"cpu <num> disable               - Disable cpu <num>\n"
 	"cpu <num> release <addr> [args] - Release cpu <num> at <addr> with [args]"
 #ifdef CPU_ARCH_HELP
 	"\n"
diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index 6530cb1..6ae7f0a 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008-2009 Freescale Semiconductor, Inc.
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
  *
  * See file CREDITS for list of people who contributed to this
  * project.
@@ -68,6 +68,12 @@ int cpu_status(int nr)
 	return 0;
 }
 
+int cpu_disable(int nr)
+{
+	/* dummy function so common/cmd_mp.c will build */
+	return 1;
+}
+
 static u8 boot_entry_map[4] = {
 	0,
 	BOOT_ENTRY_PIR,
diff --git a/cpu/mpc86xx/mp.c b/cpu/mpc86xx/mp.c
index 2940673..ecdf2fb 100644
--- a/cpu/mpc86xx/mp.c
+++ b/cpu/mpc86xx/mp.c
@@ -1,3 +1,25 @@
+/*
+ * Copyright 2008-2010 Freescale Semiconductor, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
 #include <common.h>
 #include <asm/processor.h>
 #include <asm/mmu.h>
@@ -24,6 +46,12 @@ int cpu_status(int nr)
 	return 0;
 }
 
+int cpu_disable(int nr)
+{
+	/* dummy function so common/cmd_mp.c will build */
+	return 1;
+}
+
 int cpu_release(int nr, int argc, char *argv[])
 {
 	/* dummy function so common/cmd_mp.c will build
diff --git a/include/common.h b/include/common.h
index 07897f6..f90da23 100644
--- a/include/common.h
+++ b/include/common.h
@@ -703,6 +703,7 @@ void show_boot_progress(int val);
 #ifdef CONFIG_MP
 int cpu_status(int nr);
 int cpu_reset(int nr);
+int cpu_disable(int nr);
 int cpu_release(int nr, int argc, char *argv[]);
 #endif
 
-- 
1.6.0.6

[U-Boot] [PATCH 2/3] 86xx: Add support for 'cpu disable' command

[Kumar Gala]

Support disabling of a core via user command 'cpu disable'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 cpu/mpc86xx/mp.c             |   18 ++++++++++++++++--
 include/asm-ppc/immap_86xx.h |   33 ++++++++++++++++++---------------
 2 files changed, 34 insertions(+), 17 deletions(-)

diff --git a/cpu/mpc86xx/mp.c b/cpu/mpc86xx/mp.c
index ecdf2fb..2c72752 100644
--- a/cpu/mpc86xx/mp.c
+++ b/cpu/mpc86xx/mp.c
@@ -48,8 +48,22 @@ int cpu_status(int nr)
 
 int cpu_disable(int nr)
 {
-	/* dummy function so common/cmd_mp.c will build */
-	return 1;
+	volatile immap_t *immap = (immap_t *) CONFIG_SYS_CCSRBAR;
+	volatile ccsr_gur_t *gur = &immap->im_gur;
+
+	switch (nr) {
+	case 0:
+		setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU0);
+		break;
+	case 1:
+		setbits_be32(&gur->devdisr, MPC86xx_DEVDISR_CPU1);
+		break;
+	default:
+		printf("Invalid cpu number for disable %d\n", nr);
+		return 1;
+	}
+	
+	return 0;
 }
 
 int cpu_release(int nr, int argc, char *argv[])
diff --git a/include/asm-ppc/immap_86xx.h b/include/asm-ppc/immap_86xx.h
index 098f253..fd7acdb 100644
--- a/include/asm-ppc/immap_86xx.h
+++ b/include/asm-ppc/immap_86xx.h
@@ -1186,17 +1186,8 @@ typedef struct ccsr_rio {
 typedef struct ccsr_gur {
 	uint	porpllsr;	/* 0xe0000 - POR PLL ratio status register */
 	uint	porbmsr;	/* 0xe0004 - POR boot mode status register */
-#define MPC8610_PORBMSR_HA      0x00070000
-#define MPC8610_PORBMSR_HA_SHIFT	16
-#define MPC8641_PORBMSR_HA      0x00060000
-#define MPC8641_PORBMSR_HA_SHIFT	17
 	uint	porimpscr;	/* 0xe0008 - POR I/O impedance status and control register */
 	uint	pordevsr;	/* 0xe000c - POR I/O device status regsiter */
-#define MPC8610_PORDEVSR_IO_SEL		0x00380000
-#define MPC8610_PORDEVSR_IO_SEL_SHIFT		19
-#define MPC8641_PORDEVSR_IO_SEL		0x000F0000
-#define MPC8641_PORDEVSR_IO_SEL_SHIFT		16
-#define MPC86xx_PORDEVSR_CORE1TE	0x00000080 /* ASMP (Core1 addr trans) */
 	uint	pordbgmsr;	/* 0xe0010 - POR debug mode status register */
 	char	res1[12];
 	uint	gpporcr;	/* 0xe0020 - General-purpose POR configuration register */
@@ -1210,11 +1201,6 @@ typedef struct ccsr_gur {
 	uint	pmuxcr;		/* 0xe0060 - Alternate function signal multiplex control */
 	char	res6[12];
 	uint	devdisr;	/* 0xe0070 - Device disable control */
-#define MPC86xx_DEVDISR_PCIEX1	0x80000000
-#define MPC86xx_DEVDISR_PCIEX2	0x40000000
-#define MPC86xx_DEVDISR_PCI1	0x80000000
-#define MPC86xx_DEVDISR_PCIE1	0x40000000
-#define MPC86xx_DEVDISR_PCIE2	0x20000000
 	char	res7[12];
 	uint	powmgtcsr;	/* 0xe0080 - Power management status and control register */
 	char	res8[12];
@@ -1225,7 +1211,6 @@ typedef struct ccsr_gur {
 	uint	svr;		/* 0xe00a4 - System version register */
 	char	res10a[8];
 	uint	rstcr;		/* 0xe00b0 - Reset control register */
-#define MPC86xx_RSTCR_HRST_REQ	0x00000002
 	char	res10b[1868];
 	uint	clkdvdr;	/* 0xe0800 - Clock Divide register */
 	char	res10c[796];
@@ -1250,6 +1235,24 @@ typedef struct ccsr_gur {
 	char	res16[184];
 } ccsr_gur_t;
 
+#define MPC8610_PORBMSR_HA      0x00070000
+#define MPC8610_PORBMSR_HA_SHIFT	16
+#define MPC8641_PORBMSR_HA      0x00060000
+#define MPC8641_PORBMSR_HA_SHIFT	17
+#define MPC8610_PORDEVSR_IO_SEL		0x00380000
+#define MPC8610_PORDEVSR_IO_SEL_SHIFT		19
+#define MPC8641_PORDEVSR_IO_SEL		0x000F0000
+#define MPC8641_PORDEVSR_IO_SEL_SHIFT		16
+#define MPC86xx_PORDEVSR_CORE1TE	0x00000080 /* ASMP (Core1 addr trans) */
+#define MPC86xx_DEVDISR_PCIEX1	0x80000000
+#define MPC86xx_DEVDISR_PCIEX2	0x40000000
+#define MPC86xx_DEVDISR_PCI1	0x80000000
+#define MPC86xx_DEVDISR_PCIE1	0x40000000
+#define MPC86xx_DEVDISR_PCIE2	0x20000000
+#define MPC86xx_DEVDISR_CPU0	0x00008000
+#define MPC86xx_DEVDISR_CPU1	0x00004000
+#define MPC86xx_RSTCR_HRST_REQ	0x00000002
+
 /*
  * Watchdog register block(0xe_4000-0xe_4fff)
  */
-- 
1.6.0.6

[U-Boot] [PATCH 3/3] 85xx: Add support for 'cpu disable' command

[Kumar Gala]

Support disabling of a core via user command 'cpu disable'.

Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
---
 cpu/mpc85xx/mp.c |   28 ++++++++++++++++++++++++++--
 1 files changed, 26 insertions(+), 2 deletions(-)

diff --git a/cpu/mpc85xx/mp.c b/cpu/mpc85xx/mp.c
index 6ae7f0a..73c7f87 100644
--- a/cpu/mpc85xx/mp.c
+++ b/cpu/mpc85xx/mp.c
@@ -68,11 +68,35 @@ int cpu_status(int nr)
 	return 0;
 }
 
+#ifdef CONFIG_FSL_CORENET
 int cpu_disable(int nr)
 {
-	/* dummy function so common/cmd_mp.c will build */
-	return 1;
+	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+	setbits_be32(&gur->coredisrl, nr);
+
+	return 0;
 }
+#else
+int cpu_disable(int nr)
+{
+	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
+
+	switch (nr) {
+	case 0:
+		setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU0);
+		break;
+	case 1:
+		setbits_be32(&gur->devdisr, MPC85xx_DEVDISR_CPU1);
+		break;
+	default:
+		printf("Invalid cpu number for disable %d\n", nr);
+		return 1;
+	}
+	
+	return 0;
+}
+#endif
 
 static u8 boot_entry_map[4] = {
 	0,
-- 
1.6.0.6

[U-Boot] [PATCH 3/3] 85xx: Add support for 'cpu disable' command

[Peter Tyser]

Hi Kumar,

<snip>
 
> +#ifdef CONFIG_FSL_CORENET
>  int cpu_disable(int nr)
>  {
> -	/* dummy function so common/cmd_mp.c will build */
> -	return 1;
> +	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
> +
> +	setbits_be32(&gur->coredisrl, nr);

Doesn't this need to be "1 << nr"?

Peter

[U-Boot] [PATCH 3/3] 85xx: Add support for 'cpu disable' command

[Kumar Gala]

On Jan 12, 2010, at 1:16 PM, Peter Tyser wrote:

> Hi Kumar,
> 
> <snip>
> 
>> +#ifdef CONFIG_FSL_CORENET
>> int cpu_disable(int nr)
>> {
>> -	/* dummy function so common/cmd_mp.c will build */
>> -	return 1;
>> +	volatile ccsr_gur_t *gur = (void *)(CONFIG_SYS_MPC85xx_GUTS_ADDR);
>> +
>> +	setbits_be32(&gur->coredisrl, nr);
> 
> Doesn't this need to be "1 << nr"?

Yes, good catch.

- k

[U-Boot] [PATCH 1/3] Add support to disable cpu's in multicore processors

[Kumar Gala]

On Jan 12, 2010, at 1:03 PM, Kumar Gala wrote:

> Add a disable sub-command to the cpu command that allows for disabling
> cores in multicore processors.  This can be useful for systems that are
> using multicore chips but aren't utilizing all the cores as a way to
> reduce power and possibly improve performance.
> 
> Also updated an added missing copyright.
> 
> Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> ---
> common/cmd_mp.c  |    3 +++
> cpu/mpc85xx/mp.c |    8 +++++++-
> cpu/mpc86xx/mp.c |   28 ++++++++++++++++++++++++++++
> include/common.h |    1 +
> 4 files changed, 39 insertions(+), 1 deletions(-)

Wolfgang,

Did you have any comments on this.  I was going to pull it into the mpc85xx tree and send it as a pull request (with the other related cpu specific patches).

- k

[U-Boot] [PATCH 1/3] Add support to disable cpu's in multicore processors

[Wolfgang Denk]

Dear Kumar Gala,

In message <67D60638-14A4-4821-A778-B6F1E88D280F@kernel.crashing.org> you wrote:
> 
> On Jan 12, 2010, at 1:03 PM, Kumar Gala wrote:
> 
> > Add a disable sub-command to the cpu command that allows for disabling
> > cores in multicore processors.  This can be useful for systems that =
> are
> > using multicore chips but aren't utilizing all the cores as a way to
> > reduce power and possibly improve performance.
> >=20
> > Also updated an added missing copyright.
> >=20
> > Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
> > ---
> > common/cmd_mp.c  |    3 +++
> > cpu/mpc85xx/mp.c |    8 +++++++-
> > cpu/mpc86xx/mp.c |   28 ++++++++++++++++++++++++++++
> > include/common.h |    1 +
> > 4 files changed, 39 insertions(+), 1 deletions(-)
> 
> Wolfgang,
> 
> Did you have any comments on this.  I was going to pull it into the =
> mpc85xx tree and send it as a pull request (with the other related cpu =
> specific patches).

That's fine with me. Thanks.

Best regards,

Wolfgang Denk

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