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From: Alexander Holler <holler@ahsoftware.de>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 1/1] at91sam9x: driver to use the internal RTT as RTC
Date: Tue, 30 Mar 2010 13:17:07 +0200	[thread overview]
Message-ID: <1269947827-4752-2-git-send-email-holler@ahsoftware.de> (raw)
In-Reply-To: <1269947827-4752-1-git-send-email-holler@ahsoftware.de>

Based on the linux driver.

Signed-off-by: Alexander Holler <holler@ahsoftware.de>
---
 README                     |    1 +
 drivers/rtc/Makefile       |    1 +
 drivers/rtc/at91sam9-rtc.c |  162 ++++++++++++++++++++++++++++++++++++++++++++
 3 files changed, 164 insertions(+), 0 deletions(-)
 create mode 100644 drivers/rtc/at91sam9-rtc.c

diff --git a/README b/README
index 940b507..afe2aa6 100644
--- a/README
+++ b/README
@@ -733,6 +733,7 @@ The following options need to be configured:
 		CONFIG_RTC_ISL1208	- use Intersil ISL1208 RTC
 		CONFIG_RTC_MAX6900	- use Maxim, Inc. MAX6900 RTC
 		CONFIG_SYS_RTC_DS1337_NOOSC	- Turn off the OSC output for DS1337
+		CONFIG_RTC_AT91SAM9	- use internal RTT of AT91SAM9x
 
 		Note that if the RTC uses I2C, then the I2C interface
 		must also be configured. See I2C Support, below.
diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile
index 772a49a..4a48231 100644
--- a/drivers/rtc/Makefile
+++ b/drivers/rtc/Makefile
@@ -62,6 +62,7 @@ COBJS-$(CONFIG_RTC_RX8025) += rx8025.o
 COBJS-$(CONFIG_RTC_S3C24X0) += s3c24x0_rtc.o
 COBJS-$(CONFIG_RTC_S3C44B0) += s3c44b0_rtc.o
 COBJS-$(CONFIG_RTC_X1205) += x1205.o
+COBJS-$(CONFIG_RTC_AT91SAM9) += at91sam9-rtc.o
 
 COBJS	:= $(sort $(COBJS-y))
 SRCS	:= $(COBJS:.o=.c)
diff --git a/drivers/rtc/at91sam9-rtc.c b/drivers/rtc/at91sam9-rtc.c
new file mode 100644
index 0000000..d0a263a
--- /dev/null
+++ b/drivers/rtc/at91sam9-rtc.c
@@ -0,0 +1,162 @@
+/*
+ * "RTT as Real Time Clock" driver for AT91SAM9 SoC family
+ *
+ * (C) Copyright 2010
+ * Alexander Holler <holler@ahsoftware.de>
+ *
+ * Based on rtc-at91sam9.c from Michel Benoit
+ * Based on rtc-at91rm9200.c by Rick Bronson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/*
+ * This driver uses two configurable hardware resources that live in the
+ * AT91SAM9 backup power domain (intended to be powered at all times)
+ * to implement the Real Time Clock interfaces
+ *
+ *  - A "Real-time Timer" (RTT) counts up in seconds from a base time.
+ *    We can't assign the counter value (CRTV) ... but we can reset it.
+ *
+ *  - One of the "General Purpose Backup Registers" (GPBRs) holds the
+ *    base time, normally an offset from the beginning of the POSIX
+ *    epoch (1970-Jan-1 00:00:00 UTC).  Some systems also include the
+ *    local timezone's offset.
+ *
+ * The RTC's value is the RTT counter plus that offset.  The RTC's alarm
+ * is likewise a base (ALMV) plus that offset.
+ *
+ * Not all RTTs will be used as RTCs; some systems have multiple RTTs to
+ * choose from, or a "real" RTC module.  All systems have multiple GPBR
+ * registers available, likewise usable for more than "RTC" support.
+ *
+ * In addition to CONFIG_CMD_DATE these additional defines must be set:
+ *
+ * #define CONFIG_RTC_AT91SAM9
+ * #define CONFIG_RTC_AT91SAM9_RTT AT91_RTT0_BASE
+ * #define CONFIG_RTC_AT91SAM9_GPBR 0
+ *
+ */
+#include <common.h>
+#include <command.h>
+#include <asm/arch/io.h>
+#include <asm/arch/hardware.h>
+#include <rtc.h>
+
+#if defined(CONFIG_CMD_DATE)
+
+#undef RTC_DEBUG
+
+#ifdef RTC_DEBUG
+#  define DPRINTF(x,args...)	printf("at91sam9-rtc: " x , ##args)
+#else
+#  define DPRINTF(x,args...)
+#endif
+
+/* Defines copied from linux/arch/arm/mach-at91/include/mach/at91_rtt.h */
+#define AT91_RTT_MR		0x00		/* Real-time Mode Register */
+#define AT91_RTT_AR		0x04		/* Real-time Alarm Register */
+#define AT91_RTT_VR		0x08		/* Real-time Value Register */
+#define AT91_RTT_RTPRES		(0xffff << 0)	/* Real-time Timer Prescaler Value */
+#define AT91_RTT_ALMIEN		(1 << 16)	/* Alarm Interrupt Enable */
+#define AT91_RTT_RTTINCIEN	(1 << 17)	/* Real Time Timer Increment Interrupt Enable */
+#define AT91_RTT_RTTRST		(1 << 18)	/* Real Time Timer Restart */
+
+/*
+ * We store ALARM_DISABLED in ALMV to record that no alarm is set.
+ * It's also the reset value for that field.
+ */
+#define ALARM_DISABLED	((u32)~0)
+
+#define rtt_readl(field) \
+	readl(CONFIG_RTC_AT91SAM9_RTT + AT91_RTT_ ## field)
+#define rtt_writel(field, val) \
+	writel((val), CONFIG_RTC_AT91SAM9_RTT + AT91_RTT_ ## field)
+#define gpbr_readl() \
+	readl(AT91_GPBR_BASE + 4 * CONFIG_RTC_AT91SAM9_GPBR)
+#define gpbr_writel(val) \
+	writel((val), AT91_GPBR_BASE + 4 * CONFIG_RTC_AT91SAM9_GPBR)
+
+void rtc_reset(void)
+{
+	u32 mr = rtt_readl(MR);
+
+	/* disable interrupts and reset prescaler */
+	mr &= ~(AT91_RTT_RTPRES | AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
+	mr |= AT91_SLOW_CLOCK & AT91_RTT_RTPRES;
+	rtt_writel(MR, mr);
+
+	/* Clear values */
+	gpbr_writel(0);
+	rtt_writel(AR, ALARM_DISABLED);
+
+	/* reset and start the timer */
+	rtt_writel(MR, mr | AT91_RTT_RTTRST);
+
+	DPRINTF("Reset DATE\n");
+}
+
+int rtc_get(struct rtc_time *tmp)
+{
+	u32 secs, secs2;
+	u32 offset;
+
+	u32 mr = rtt_readl(MR);
+	if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) {
+		printf("Clock not initialized, use date (re)set!\n");
+		return 0;
+	}
+
+	/* read current time offset */
+	offset = gpbr_readl();
+	if (offset == 0) {
+		printf("Time not set!\n");
+		return 0;
+	}
+
+	/* reread the counter to help sync the two clock domains */
+	secs = rtt_readl(VR);
+	secs2 = rtt_readl(VR);
+	if (secs != secs2)
+		secs = rtt_readl(VR);
+
+	to_tm (offset+secs, tmp);
+
+	DPRINTF("Get DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+		tmp->tm_hour, tmp->tm_min, tmp->tm_sec );
+
+	return 0;
+}
+
+int rtc_set(struct rtc_time *tmp)
+{
+	u32 secs = mktime(tmp->tm_year, tmp->tm_mon, tmp->tm_mday,
+			tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+	rtc_reset();
+	gpbr_writel(secs);
+
+	DPRINTF("Set DATE: %4d-%02d-%02d (wday=%d)  TIME: %2d:%02d:%02d\n",
+		tmp->tm_year, tmp->tm_mon, tmp->tm_mday, tmp->tm_wday,
+		tmp->tm_hour, tmp->tm_min, tmp->tm_sec);
+
+	return 0;
+}
+
+#endif /* CONFIG_CMD_DATE */
-- 
1.6.2.5

  reply	other threads:[~2010-03-30 11:17 UTC|newest]

Thread overview: 13+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2010-03-29 19:39 [U-Boot] [PATCH 0/2] at91sam9x: driver to use the internal RTT as RTC Alexander Holler
2010-03-29 19:39 ` [U-Boot] [PATCH 1/2] at91: add defines for RTT and GPBR Alexander Holler
2010-03-29 19:39   ` [U-Boot] [PATCH 2/2] at91sam9x: driver to use the internal RTT as RTC Alexander Holler
2010-03-29 20:39     ` Alexander Holler
2010-03-30 11:17       ` [U-Boot] [PATCH 0/1] at91samm9x: fix for the rtc-driver Alexander Holler
2010-03-30 11:17         ` Alexander Holler [this message]
2010-04-03 18:33           ` [U-Boot] [PATCH 1/1] at91sam9x: driver to use the internal RTT as RTC Tom
2010-04-03 19:30             ` Alexander Holler
2010-04-05 13:19               ` Tom
2010-04-03 18:36   ` [U-Boot] [PATCH 1/2] at91: add defines for RTT and GPBR Tom
2010-04-03 20:41     ` Alexander Holler
2010-04-05 13:29       ` Tom
2010-04-11 17:23   ` Tom

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